coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
chip.h
Go to the documentation of this file.
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/* SPDX-License-Identifier: GPL-2.0-only */
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struct
drivers_i2c_rtd2132_config
{
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/* Panel Power Sequencing. All units in ms. */
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u16
t1
;
/* Delay from panel Vcc enable to LVDS output enable. */
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u16
t2
;
/* Delay from LVDS output enable to PWM output enable. */
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u16
t3
;
/* Delay from PWM output enable to backlight output enable. */
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u16
t4
;
/* Delay from backlight output disable to PWM output disable. */
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u16
t5
;
/* Delay from PWM output disable to LVDS output disable. */
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u16
t6
;
/* Delay from LVDS output disable to panel Vcc disable. */
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u16
t7
;
/* Delay between tweo panel power on/off sequence. */
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/*
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* LVDS swap.
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* 0x00 - Normal
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* 0x01 - Mirror
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* 0x02 - P/N
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* 0x03 - Mirror + P/N
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* 0x04 - R/L
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*
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* Dual Support or in bit 7:
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* 0x80 - Dual Swap
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*/
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u8
lvds_swap
;
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/*
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* LVDS Spread Spectrum Clock
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* 0x00 = DISABLED
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* 0x05 = 0.5%
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* 0x10 = 1.0%
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* 0x15 = 1.5%
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*/
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u8
sscg_percent
;
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};
u16
uint16_t u16
Definition:
stdint.h:48
u8
uint8_t u8
Definition:
stdint.h:45
drivers_i2c_rtd2132_config
Definition:
chip.h:3
drivers_i2c_rtd2132_config::lvds_swap
u8 lvds_swap
Definition:
chip.h:24
drivers_i2c_rtd2132_config::t6
u16 t6
Definition:
chip.h:10
drivers_i2c_rtd2132_config::sscg_percent
u8 sscg_percent
Definition:
chip.h:33
drivers_i2c_rtd2132_config::t7
u16 t7
Definition:
chip.h:11
drivers_i2c_rtd2132_config::t1
u16 t1
Definition:
chip.h:5
drivers_i2c_rtd2132_config::t3
u16 t3
Definition:
chip.h:7
drivers_i2c_rtd2132_config::t5
u16 t5
Definition:
chip.h:9
drivers_i2c_rtd2132_config::t4
u16 t4
Definition:
chip.h:8
drivers_i2c_rtd2132_config::t2
u16 t2
Definition:
chip.h:6
src
drivers
i2c
rtd2132
chip.h
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