coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
board_verified_boot.c
Go to the documentation of this file.
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include "board_verified_boot.h"
4 
5 /*
6  * The items verified by the bootblock, the bootblock will not measure the
7  * items to the TPM
8  */
9 const verify_item_t bootblock_verify_list[] = {
10  { VERIFY_FILE, ROMSTAGE, { { NULL, CBFS_TYPE_STAGE } },
11  HASH_IDX_ROM_STAGE, MBOOT_PCR_INDEX_0 },
12  { VERIFY_FILE, BOOTBLOCK, { { NULL, CBFS_TYPE_BOOTBLOCK } },
13  HASH_IDX_BOOTBLOCK, MBOOT_PCR_INDEX_0 },
14  { VERIFY_FILE, FSP, { { NULL, CBFS_TYPE_FSP } }, HASH_IDX_FSP,
15  MBOOT_PCR_INDEX_1 },
16  { VERIFY_FILE, "spd.bin", { { NULL, CBFS_TYPE_SPD } },
17  HASH_IDX_SPD0, MBOOT_PCR_INDEX_1 },
18 #if CONFIG(VENDORCODE_ELTAN_VBOOT_SIGNED_MANIFEST)
19  { VERIFY_BLOCK, "PublicKey",
20  { { (void *)CONFIG_VENDORCODE_ELTAN_VBOOT_KEY_LOCATION,
21  CONFIG_VENDORCODE_ELTAN_VBOOT_KEY_SIZE, } }, HASH_IDX_PUBLICKEY,
22  MBOOT_PCR_INDEX_0 },
23 #endif
24  { VERIFY_TERMINATOR, NULL, { { NULL, 0 } }, 0, 0 }
25 };
26 
27 /*
28  * The items used by the romstage. Items verified by bootblock are added here to make sure they
29  * are measured
30  */
31 const verify_item_t romstage_verify_list[] = {
32  { VERIFY_FILE, ROMSTAGE, { { NULL, CBFS_TYPE_STAGE } },
33  HASH_IDX_ROM_STAGE, MBOOT_PCR_INDEX_0 },
34  { VERIFY_FILE, MICROCODE, { { NULL, CBFS_TYPE_MICROCODE } },
35  HASH_IDX_MICROCODE, MBOOT_PCR_INDEX_1 },
36  { VERIFY_FILE, FSP, { { NULL, CBFS_TYPE_FSP } }, HASH_IDX_FSP,
37  MBOOT_PCR_INDEX_1 },
38  { VERIFY_FILE, "spd.bin", { { NULL, CBFS_TYPE_SPD } },
39  HASH_IDX_SPD0, MBOOT_PCR_INDEX_1 },
40  { VERIFY_FILE, BOOTBLOCK, { { NULL, CBFS_TYPE_BOOTBLOCK } },
41  HASH_IDX_BOOTBLOCK, MBOOT_PCR_INDEX_0 },
42 #if CONFIG(VENDORCODE_ELTAN_VBOOT_SIGNED_MANIFEST)
43  { VERIFY_BLOCK, "PublicKey",
44  { { (void *)CONFIG_VENDORCODE_ELTAN_VBOOT_KEY_LOCATION,
45  CONFIG_VENDORCODE_ELTAN_VBOOT_KEY_SIZE, } }, HASH_IDX_PUBLICKEY,
46  MBOOT_PCR_INDEX_6 },
47 #endif
48  { VERIFY_TERMINATOR, NULL, { { NULL, 0 } }, 0, 0 }
49 };
50 
51 /* The items used by the postcar stage */
52 const verify_item_t postcar_verify_list[] = {
53  { VERIFY_FILE, POSTCAR, { { NULL, CBFS_TYPE_STAGE } },
54  HASH_IDX_POSTCAR_STAGE, MBOOT_PCR_INDEX_0 },
55  { VERIFY_TERMINATOR, NULL, { { NULL, 0 } }, 0, 0 }
56 };
57 
58 /*
59  * The items used by the ramstage. FSP and microcode are already checked in the
60  * romstage verify list
61  */
62 static const verify_item_t ram_stage_additional_list[] = {
63  { VERIFY_FILE, OP_ROM_VBT, { { NULL, CBFS_TYPE_RAW } },
64  HASH_IDX_OPROM, MBOOT_PCR_INDEX_2 },
65 #if CONFIG(BMP_LOGO)
66  { VERIFY_FILE, "logo.bmp", { { NULL, CBFS_TYPE_RAW } },
67  HASH_IDX_LOGO, MBOOT_PCR_INDEX_2 },
68 #endif
69  { VERIFY_FILE, "fallback/dsdt.aml", { { NULL, CBFS_TYPE_RAW } },
70  HASH_IDX_DSDT, MBOOT_PCR_INDEX_2 },
71  { VERIFY_TERMINATOR, NULL, { { NULL, 0 } }, 0, 0 }
72 };
73 
74 const verify_item_t ramstage_verify_list[] = {
75  { VERIFY_FILE, RAMSTAGE, { { ram_stage_additional_list,
76  CBFS_TYPE_STAGE } }, HASH_IDX_RAM_STAGE, MBOOT_PCR_INDEX_0 },
77  { VERIFY_TERMINATOR, NULL, { { NULL, 0 } }, 0, 0 }
78 };
79 
80 /* items used by the payload */
81 const verify_item_t payload_verify_list[] = {
82  { VERIFY_FILE, PAYLOAD, { { NULL, CBFS_TYPE_SELF |
83  VERIFIED_BOOT_COPY_BLOCK } }, HASH_IDX_PAYLOAD,
84  MBOOT_PCR_INDEX_3 },
85  { VERIFY_TERMINATOR, NULL, { { NULL, 0 } }, 0, 0 }
86 };
87 
88 /* list of allowed options roms */
89 const verify_item_t oprom_verify_list[] = {
90  { VERIFY_TERMINATOR, NULL, { { NULL, 0 } }, 0, 0 }
91 };
const verify_item_t romstage_verify_list[]
const verify_item_t bootblock_verify_list[]
static const verify_item_t ram_stage_additional_list[]
const verify_item_t oprom_verify_list[]
const verify_item_t payload_verify_list[]
const verify_item_t ramstage_verify_list[]
const verify_item_t postcar_verify_list[]
#define MICROCODE
#define OP_ROM_VBT
#define FSP
#define PAYLOAD
@ CBFS_TYPE_SELF
@ CBFS_TYPE_STAGE
@ CBFS_TYPE_RAW
@ CBFS_TYPE_SPD
@ CBFS_TYPE_MICROCODE
@ CBFS_TYPE_FSP
@ CBFS_TYPE_BOOTBLOCK
#define POSTCAR(addr, sz)
Definition: memlayout.h:204
#define ROMSTAGE(addr, sz)
Definition: memlayout.h:146
#define RAMSTAGE(addr, sz)
Definition: memlayout.h:159
#define BOOTBLOCK(addr, sz)
Definition: memlayout.h:133
#define HASH_IDX_SPD0
Definition: manifest.h:16
#define HASH_IDX_PAYLOAD
Definition: manifest.h:12
#define HASH_IDX_FSP
Definition: manifest.h:14
#define HASH_IDX_LOGO
Definition: manifest.h:17
#define HASH_IDX_OPROM
Definition: manifest.h:13
#define HASH_IDX_DSDT
Definition: manifest.h:18
#define HASH_IDX_POSTCAR_STAGE
Definition: manifest.h:19
#define HASH_IDX_BOOTBLOCK
Definition: manifest.h:21
#define HASH_IDX_RAM_STAGE
Definition: manifest.h:11
#define HASH_IDX_ROM_STAGE
Make sure the index matches the actual order in the manifest generated using the HashCb....
Definition: manifest.h:10
#define HASH_IDX_PUBLICKEY
Definition: manifest.h:20
#define HASH_IDX_MICROCODE
Definition: manifest.h:15
#define NULL
Definition: stddef.h:19