#include <chip.h>

Collaboration diagram for soc_intel_denverton_ns_config:

Data Fields
uint8_t	pirqa_routing
	Interrupt Routing configuration If bit7 is 1, the interrupt is disabled. More...

uint8_t	pirqb_routing

uint8_t	pirqc_routing

uint8_t	pirqd_routing

uint8_t	pirqe_routing

uint8_t	pirqf_routing

uint8_t	pirqg_routing

uint8_t	pirqh_routing

uint16_t	ir00_routing
	Device Interrupt Routing configuration Interrupt Pin x Route. More...

uint16_t	ir01_routing

uint16_t	ir02_routing

uint16_t	ir03_routing

uint16_t	ir04_routing

uint16_t	ir05_routing

uint16_t	ir06_routing

uint16_t	ir07_routing

uint16_t	ir08_routing

uint16_t	ir09_routing

uint16_t	ir10_routing

uint16_t	ir11_routing

uint16_t	ir12_routing

uint32_t	ipc0
	Device Interrupt Polarity Control ipc0 - IRQ-00-31 - 1: Active low to IOAPIC, 0: Active high to IOAPIC ipc1 - IRQ-32-63 - 1: Active low to IOAPIC, 0: Active high to IOAPIC ipc2 - IRQ-64-95 - 1: Active low to IOAPIC, 0: Active high to IOAPIC ipc3 - IRQ-96-119 - 1: Active low to IOAPIC, 0: Active high to IOAPIC. More...

uint32_t	ipc1

uint32_t	ipc2

uint32_t	ipc3

uint32_t	tcc_offset

Detailed Description

Definition at line 8 of file chip.h.

Field Documentation

◆ ipc0

uint32_t soc_intel_denverton_ns_config::ipc0

Device Interrupt Polarity Control ipc0 - IRQ-00-31 - 1: Active low to IOAPIC, 0: Active high to IOAPIC ipc1 - IRQ-32-63 - 1: Active low to IOAPIC, 0: Active high to IOAPIC ipc2 - IRQ-64-95 - 1: Active low to IOAPIC, 0: Active high to IOAPIC ipc3 - IRQ-96-119 - 1: Active low to IOAPIC, 0: Active high to IOAPIC.

Definition at line 55 of file chip.h.

◆ ipc1

uint32_t soc_intel_denverton_ns_config::ipc1

Definition at line 56 of file chip.h.

◆ ipc2

uint32_t soc_intel_denverton_ns_config::ipc2

Definition at line 57 of file chip.h.

◆ ipc3

uint32_t soc_intel_denverton_ns_config::ipc3

Definition at line 58 of file chip.h.

◆ ir00_routing

uint16_t soc_intel_denverton_ns_config::ir00_routing

Device Interrupt Routing configuration Interrupt Pin x Route.

0h = PIRQA# 1h = PIRQB# 2h = PIRQC# 3h = PIRQD# 4h = PIRQE# 5h = PIRQF# 6h = PIRQG# 7h = PIRQH#

Definition at line 34 of file chip.h.

◆ ir01_routing

uint16_t soc_intel_denverton_ns_config::ir01_routing

Definition at line 35 of file chip.h.

◆ ir02_routing

uint16_t soc_intel_denverton_ns_config::ir02_routing

Definition at line 36 of file chip.h.

◆ ir03_routing

uint16_t soc_intel_denverton_ns_config::ir03_routing

Definition at line 37 of file chip.h.

◆ ir04_routing

uint16_t soc_intel_denverton_ns_config::ir04_routing

Definition at line 38 of file chip.h.

◆ ir05_routing

uint16_t soc_intel_denverton_ns_config::ir05_routing

Definition at line 39 of file chip.h.

◆ ir06_routing

uint16_t soc_intel_denverton_ns_config::ir06_routing

Definition at line 40 of file chip.h.

◆ ir07_routing

uint16_t soc_intel_denverton_ns_config::ir07_routing

Definition at line 41 of file chip.h.

◆ ir08_routing

uint16_t soc_intel_denverton_ns_config::ir08_routing

Definition at line 42 of file chip.h.

◆ ir09_routing

uint16_t soc_intel_denverton_ns_config::ir09_routing

Definition at line 43 of file chip.h.

◆ ir10_routing

uint16_t soc_intel_denverton_ns_config::ir10_routing

Definition at line 44 of file chip.h.

◆ ir11_routing

uint16_t soc_intel_denverton_ns_config::ir11_routing

Definition at line 45 of file chip.h.

◆ ir12_routing

uint16_t soc_intel_denverton_ns_config::ir12_routing

Definition at line 46 of file chip.h.

◆ pirqa_routing

uint8_t soc_intel_denverton_ns_config::pirqa_routing

Interrupt Routing configuration If bit7 is 1, the interrupt is disabled.

Definition at line 13 of file chip.h.

◆ pirqb_routing

uint8_t soc_intel_denverton_ns_config::pirqb_routing

Definition at line 14 of file chip.h.

◆ pirqc_routing

uint8_t soc_intel_denverton_ns_config::pirqc_routing

Definition at line 15 of file chip.h.

◆ pirqd_routing

uint8_t soc_intel_denverton_ns_config::pirqd_routing

Definition at line 16 of file chip.h.

◆ pirqe_routing

uint8_t soc_intel_denverton_ns_config::pirqe_routing

Definition at line 17 of file chip.h.

◆ pirqf_routing

uint8_t soc_intel_denverton_ns_config::pirqf_routing

Definition at line 18 of file chip.h.

◆ pirqg_routing

uint8_t soc_intel_denverton_ns_config::pirqg_routing

Definition at line 19 of file chip.h.

◆ pirqh_routing

uint8_t soc_intel_denverton_ns_config::pirqh_routing

Definition at line 20 of file chip.h.

◆ tcc_offset

uint32_t soc_intel_denverton_ns_config::tcc_offset

Definition at line 61 of file chip.h.

The documentation for this struct was generated from the following file:

src/soc/intel/denverton_ns/chip.h

Data Fields