coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
sn65dsi86bridge.h File Reference
#include <edid.h>
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Enumerations

enum  dp_pll_clk_src {
  SN65_SEL_12MHZ = 0x0 , SN65_SEL_19MHZ = 0x1 , SN65_SEL_26MHZ = 0x2 , SN65_SEL_27MHZ = 0x3 ,
  SN65_SEL_38MHZ = 0x4
}
 

Functions

void sn65dsi86_bridge_init (uint8_t bus, uint8_t chip, enum dp_pll_clk_src ref_clk)
 
void sn65dsi86_bridge_configure (uint8_t bus, uint8_t chip, struct edid *edid, uint32_t num_of_lines, uint32_t dsi_bpp)
 
enum cb_err sn65dsi86_bridge_read_edid (uint8_t bus, uint8_t chip, struct edid *out)
 
void sn65dsi86_backlight_enable (uint8_t bus, uint8_t chip)
 

Enumeration Type Documentation

◆ dp_pll_clk_src

Enumerator
SN65_SEL_12MHZ 
SN65_SEL_19MHZ 
SN65_SEL_26MHZ 
SN65_SEL_27MHZ 
SN65_SEL_38MHZ 

Definition at line 8 of file sn65dsi86bridge.h.

Function Documentation

◆ sn65dsi86_backlight_enable()

void sn65dsi86_backlight_enable ( uint8_t  bus,
uint8_t  chip 
)

◆ sn65dsi86_bridge_configure()

◆ sn65dsi86_bridge_init()

void sn65dsi86_bridge_init ( uint8_t  bus,
uint8_t  chip,
enum dp_pll_clk_src  ref_clk 
)

Definition at line 472 of file sn65dsi86bridge.c.

References chip, HPD_DISABLE, i2c_write_field(), SN_DPPLL_SRC_REG, and SN_HPD_DISABLE_REG.

Referenced by display_startup().

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◆ sn65dsi86_bridge_read_edid()

enum cb_err sn65dsi86_bridge_read_edid ( uint8_t  bus,
uint8_t  chip,
struct edid out 
)

Definition at line 154 of file sn65dsi86bridge.c.

Referenced by display_startup().

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