coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
early_init.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <arch/io.h>
4 #include <device/pnp_ops.h>
5 #include <device/pnp.h>
6 #include "ec.h"
7 
9 {
10  outb(0x55, 0x2e);
11  outb(0x22, 0x2e);
12  outb(0x00, 0x2f);
13  outb(0x23, 0x2e);
14  outb(0x00, 0x2f);
15  outb(0x24, 0x2e);
16  outb(0x84, 0x2f);
17 }
18 
20 {
21  outb(0xaa, 0x2e);
22  /* one more time in PlatformStage1 of vendor firmware */
23  outb(0xaa, 0x2e);
24 
25  outb(0x83, 0x200);
26  outb(0x00, 0x201);
27  inb(0x201);
28 }
29 
31 {
32  pnp_devfn_t dev = PNP_DEV(0x2e, KBC1100_MAILBOX);
34  pnp_set_iobase(dev, PNP_IDX_IO0, 0x200);
35  pnp_set_enable(dev, 1);
36 }
37 
38 void kbc1126_kbc_init(void)
39 {
40  pnp_devfn_t dev = PNP_DEV(0x2e, KBC1100_KBC);
42  pnp_set_irq(dev, PNP_IDX_IRQ0, 0x1);
43  pnp_set_irq(dev, PNP_IDX_IRQ1, 0xc);
44  pnp_set_enable(dev, 1);
45 }
46 
47 void kbc1126_ec_init(void)
48 {
49  pnp_devfn_t dev = PNP_DEV(0x2e, KBC1100_EC0);
51  pnp_set_iobase(dev, PNP_IDX_IO0, 0x62);
52  pnp_set_enable(dev, 1);
53 }
54 
56 {
57  pnp_devfn_t dev = PNP_DEV(0x2e, SMSCSUPERIO_SP1);
59  pnp_set_iobase(dev, PNP_IDX_IO0, 0x280);
60  pnp_set_irq(dev, PNP_IDX_IRQ0, 0x6);
61  pnp_set_enable(dev, 1);
62 }
63 
64 void kbc1126_pm1_init(void)
65 {
66  pnp_devfn_t dev = PNP_DEV(0x2e, KBC1100_PM1);
68  pnp_set_iobase(dev, PNP_IDX_IO0, 0x220);
69  pnp_set_enable(dev, 1);
70 }
71 
72 /*
73  * This code is found in PEI module F65354B9-1FF0-46D7-A5F7-0926CB238048
74  * of the OEM firmware.
75  *
76  * For mainboards without a Super I/O at 0x4e, without this code, superiotool
77  * will detect an Infineon Super I/O at 0x4e.
78  */
79 
81 {
82  outb(0x55, 0x4e);
83 
84  outb(0x26, 0x4e);
85  outb(0x00, 0x4f);
86  outb(0x27, 0x4e);
87  outb(0xfe, 0x4f);
88  outb(0x60, 0x4e);
89  outb(0xfe, 0x4f);
90  outb(0x61, 0x4e);
91  outb(0x80, 0x4f);
92  outb(0x30, 0x4e);
93  outb(0x01, 0x4f);
94 
95  outb(0xaa, 0x4e);
96 }
u8 inb(u16 port)
void outb(u8 val, u16 port)
void kbc1126_ec_init(void)
Definition: early_init.c:47
void kbc1126_mailbox_init(void)
Definition: early_init.c:30
void kbc1126_kbc_init(void)
Definition: early_init.c:38
void kbc1126_pm1_init(void)
Definition: early_init.c:64
void kbc1126_enter_conf(void)
Definition: early_init.c:8
void kbc1126_exit_conf(void)
Definition: early_init.c:19
void kbc1126_disable4e(void)
Definition: early_init.c:80
void kbc1126_com1_init(void)
Definition: early_init.c:55
#define KBC1100_PM1
Definition: ec.h:6
#define KBC1100_EC0
Definition: ec.h:10
#define KBC1100_KBC
Definition: ec.h:9
#define SMSCSUPERIO_SP1
Definition: ec.h:7
#define KBC1100_MAILBOX
Definition: ec.h:11
#define PNP_IDX_IRQ1
Definition: pnp_def.h:11
#define PNP_IDX_IO0
Definition: pnp_def.h:5
#define PNP_IDX_IRQ0
Definition: pnp_def.h:10
void pnp_set_irq(struct device *dev, u8 index, u8 irq)
Definition: pnp_device.c:100
void pnp_set_logical_device(struct device *dev)
Definition: pnp_device.c:59
void pnp_set_enable(struct device *dev, int enable)
Definition: pnp_device.c:64
void pnp_set_iobase(struct device *dev, u8 index, u16 iobase)
Definition: pnp_device.c:93
#define PNP_DEV(PORT, FUNC)
Definition: pnp_type.h:10
u32 pnp_devfn_t
Definition: pnp_type.h:8