coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
smihandler.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <cpu/x86/smm.h>
5 #include <gpio.h>
6 #include <soc/smi.h>
7 #include <variant/ec.h>
8 #include <variant/gpio.h>
9 
10 void mainboard_smi_gpi(u32 gpi_sts)
11 {
12  if (CONFIG(EC_GOOGLE_CHROMEEC))
13  if (gpi_sts & (1 << EC_SMI_GPI))
15 }
16 
17 void mainboard_smi_sleep(u8 slp_typ)
18 {
19  if (CONFIG(EC_GOOGLE_CHROMEEC))
22 }
23 
25 {
26  if (CONFIG(EC_GOOGLE_CHROMEEC))
29 
30  /* Enable backlight - GPIO active low */
31  gpio_set(GPIO_133, 0);
32 
33  return 0;
34 }
void __weak mainboard_smi_sleep(u8 slp_typ)
Definition: smihandler.c:210
int __weak mainboard_smi_apmc(u8 data)
Definition: smihandler.c:209
void __weak mainboard_smi_gpi(u32 gpi_sts)
Definition: smihandler.c:208
@ CONFIG
Definition: dsi_common.h:201
void chromeec_smi_sleep(int slp_type, uint64_t s3_mask, uint64_t s5_mask)
Definition: smihandler.c:48
void chromeec_smi_process_events(void)
Definition: smihandler.c:29
void chromeec_smi_apmc(int apmc, uint64_t sci_mask, uint64_t smi_mask)
Definition: smihandler.c:89
void gpio_set(gpio_t gpio, int value)
Definition: gpio.c:174
#define MAINBOARD_EC_S5_WAKE_EVENTS
Definition: ec.h:32
#define MAINBOARD_EC_SCI_EVENTS
Definition: ec.h:12
#define MAINBOARD_EC_SMI_EVENTS
Definition: ec.h:28
#define EC_SMI_GPI
Definition: ec.h:10
#define MAINBOARD_EC_S3_WAKE_EVENTS
Definition: ec.h:37
#define GPIO_133
Definition: gpio.h:97
uint32_t u32
Definition: stdint.h:51
uint8_t u8
Definition: stdint.h:45