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em64t100_save_state.h
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/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef __EM64T100_SAVE_STATE_H__
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#define __EM64T100_SAVE_STATE_H__
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#include <types.h>
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#include <
cpu/x86/smm.h
>
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/* Intel Revision 30100 SMM State-Save Area */
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#define SMM_EM64T100_ARCH_OFFSET 0x7c00
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#define SMM_EM64T100_SAVE_STATE_OFFSET \
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SMM_SAVE_STATE_BEGIN(SMM_EM64T100_ARCH_OFFSET)
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typedef
struct
{
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u8
reserved0[256];
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u8
reserved1[208];
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u32
gdtr_upper_base
;
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u32
ldtr_upper_base
;
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u32
idtr_upper_base
;
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u8
reserved2[4];
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u64
io_rdi
;
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u64
io_rip
;
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u64
io_rcx
;
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u64
io_rsi
;
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u8
reserved3[64];
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u32
cr4
;
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u8
reserved4[72];
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u32
gdtr_base
;
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u8
reserved5[4];
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u32
idtr_base
;
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u8
reserved6[4];
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u32
ldtr_base
;
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u8
reserved7[88];
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u32
smbase;
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u32
smm_revision
;
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u16
io_restart
;
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u16
autohalt_restart
;
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u8
reserved8[24];
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u64
r15;
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u64
r14;
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u64
r13;
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u64
r12;
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u64
r11;
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u64
r10;
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u64
r9;
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u64
r8;
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u64
rax;
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u64
rcx;
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u64
rdx;
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u64
rbx;
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u64
rsp;
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u64
rbp
;
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u64
rsi;
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u64
rdi;
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u64
io_mem_addr
;
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u32
io_misc_info
;
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u32
es_sel
;
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u32
cs_sel
;
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u32
ss_sel
;
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u32
ds_sel
;
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u32
fs_sel
;
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u32
gs_sel
;
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u32
ldtr_sel
;
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u32
tr_sel
;
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u64
dr7;
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u64
dr6;
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u64
rip;
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u64
efer;
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u64
rflags;
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u64
cr3;
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u64
cr0;
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}
__packed
em64t100_smm_state_save_area_t;
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#endif
smm_revision
uint32_t smm_revision(void)
Definition:
smihandler.c:109
smm.h
u64
uint64_t u64
Definition:
stdint.h:54
u32
uint32_t u32
Definition:
stdint.h:51
u16
uint16_t u16
Definition:
stdint.h:48
u8
uint8_t u8
Definition:
stdint.h:45
__packed
Definition:
x86.c:23
__packed::idtr_upper_base
u32 idtr_upper_base
Definition:
em64t100_save_state.h:20
__packed::ldtr_upper_base
u32 ldtr_upper_base
Definition:
em64t100_save_state.h:19
__packed::io_rip
u64 io_rip
Definition:
em64t100_save_state.h:25
__packed::io_restart
u16 io_restart
Definition:
em64t100_save_state.h:45
__packed::ldtr_base
u32 ldtr_base
Definition:
em64t100_save_state.h:38
__packed::gdtr_base
u32 gdtr_base
Definition:
em64t100_save_state.h:34
__packed::io_rcx
u64 io_rcx
Definition:
em64t100_save_state.h:26
__packed::io_rdi
u64 io_rdi
Definition:
em64t100_save_state.h:24
__packed::autohalt_restart
u16 autohalt_restart
Definition:
em64t100_save_state.h:46
__packed::io_misc_info
u32 io_misc_info
Definition:
em64t100_save_state.h:70
__packed::gdtr_upper_base
u32 gdtr_upper_base
Definition:
em64t100_save_state.h:18
__packed::cs_sel
u32 cs_sel
Definition:
em64t100_save_state.h:73
__packed::fs_sel
u32 fs_sel
Definition:
em64t100_save_state.h:76
__packed::io_mem_addr
u64 io_mem_addr
Definition:
em64t100_save_state.h:69
__packed::rbp
u64 rbp
Definition:
em64t100_save_state.h:65
__packed::cr4
u32 cr4
Definition:
em64t100_save_state.h:30
__packed::es_sel
u32 es_sel
Definition:
em64t100_save_state.h:72
__packed::io_rsi
u64 io_rsi
Definition:
em64t100_save_state.h:27
__packed::idtr_base
u32 idtr_base
Definition:
em64t100_save_state.h:36
__packed::ds_sel
u32 ds_sel
Definition:
em64t100_save_state.h:75
__packed::tr_sel
u32 tr_sel
Definition:
em64t100_save_state.h:80
__packed::gs_sel
u32 gs_sel
Definition:
em64t100_save_state.h:77
__packed::ss_sel
u32 ss_sel
Definition:
em64t100_save_state.h:74
__packed::ldtr_sel
u32 ldtr_sel
Definition:
em64t100_save_state.h:79
src
include
cpu
intel
em64t100_save_state.h
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