3 #ifndef CPU_SAMSUNG_EXYNOS5250_SPI_H
4 #define CPU_SAMSUNG_EXYNOS5250_SPI_H
26 #define EXYNOS_SPI_MAX_FREQ 50000000
28 #define SPI_TIMEOUT_MS 10
30 #define SF_READ_DATA_CMD 0x3
33 #define SPI_CH_HS_EN (1 << 6)
34 #define SPI_CH_RST (1 << 5)
35 #define SPI_SLAVE_MODE (1 << 4)
36 #define SPI_CH_CPOL_L (1 << 3)
37 #define SPI_CH_CPHA_B (1 << 2)
38 #define SPI_RX_CH_ON (1 << 1)
39 #define SPI_TX_CH_ON (1 << 0)
42 #define SPI_MODE_CH_WIDTH_WORD (0x2 << 29)
43 #define SPI_MODE_BUS_WIDTH_WORD (0x2 << 17)
46 #define SPI_SLAVE_SIG_INACT (1 << 0)
49 #define SPI_ST_TX_DONE (1 << 25)
50 #define SPI_FIFO_LVL_MASK 0x1ff
51 #define SPI_TX_LVL_OFFSET 6
52 #define SPI_RX_LVL_OFFSET 15
55 #define SPI_CLK_BYPASS (0 << 0)
56 #define SPI_FB_DELAY_90 (1 << 0)
57 #define SPI_FB_DELAY_180 (2 << 0)
58 #define SPI_FB_DELAY_270 (3 << 0)
61 #define SPI_PACKET_CNT_EN (1 << 16)
64 #define SPI_TX_SWAP_EN (1 << 0)
65 #define SPI_TX_BYTE_SWAP (1 << 2)
66 #define SPI_TX_HWORD_SWAP (1 << 3)
67 #define SPI_TX_BYTE_SWAP (1 << 2)
68 #define SPI_RX_SWAP_EN (1 << 4)
69 #define SPI_RX_BYTE_SWAP (1 << 6)
70 #define SPI_RX_HWORD_SWAP (1 << 7)
check_member(tegra_spi_regs, spare_ctl, 0x18c)
void exynos_init_spi_boot_device(void)
const struct region_device * exynos_spi_boot_device(void)
int exynos_spi_close(struct exynos_spi *regs)
int exynos_spi_open(struct exynos_spi *regs)
int exynos_spi_read(struct exynos_spi *regs, void *dest, u32 len, u32 off)
unsigned char reserved2[4]
unsigned char reserved0[4]
unsigned char reserved1[4]
unsigned char padding[0xffd0]