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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <types.h>
Go to the source code of this file.
Macros | |
#define | AOAC_DEV_D3_CTL(device) (0x40 + device * 2) |
#define | AOAC_DEV_D3_STATE(device) (AOAC_DEV_D3_CTL(device) + 1) |
#define | FCH_AOAC_TARGET_DEVICE_STATE (BIT(0) + BIT(1)) |
#define | FCH_AOAC_D0_UNINITIALIZED 0 |
#define | FCH_AOAC_D0_INITIALIZED 1 |
#define | FCH_AOAC_D1_2_3_WARM 2 |
#define | FCH_AOAC_D3_COLD 3 |
#define | FCH_AOAC_DEVICE_STATE BIT(2) |
#define | FCH_AOAC_PWR_ON_DEV BIT(3) |
#define | FCH_AOAC_SW_PWR_ON_RSTB BIT(4) |
#define | FCH_AOAC_SW_REF_CLK_OK BIT(5) |
#define | FCH_AOAC_SW_RST_B BIT(6) |
#define | FCH_AOAC_IS_SW_CONTROL BIT(7) |
#define | FCH_AOAC_PWR_RST_STATE BIT(0) |
#define | FCH_AOAC_REF_CLK_OK_STATE BIT(1) |
#define | FCH_AOAC_RST_B_STATE BIT(2) |
#define | FCH_AOAC_DEV_OFF_GATING_STATE BIT(3) |
#define | FCH_AOAC_D3COLD BIT(4) |
#define | FCH_AOAC_CLK_OK_STATE BIT(5) |
#define | FCH_AOAC_STAT0 BIT(6) |
#define | FCH_AOAC_STAT1 BIT(7) |
Functions | |
bool | is_aoac_device_enabled (unsigned int dev) |
void | power_on_aoac_device (unsigned int dev) |
void | power_off_aoac_device (unsigned int dev) |
#define AOAC_DEV_D3_STATE | ( | device | ) | (AOAC_DEV_D3_CTL(device) + 1) |
Definition at line 24 of file aoac.c.
References AOAC_DEV_D3_STATE, aoac_read8(), FCH_AOAC_PWR_RST_STATE, and FCH_AOAC_REF_CLK_OK_STATE.
Referenced by enable_aoac_devices(), set_sb_aoac(), and wait_for_aoac_enabled().
Definition at line 17 of file aoac.c.
References AOAC_DEV_D3_CTL, aoac_read8(), aoac_write8(), and FCH_AOAC_PWR_ON_DEV.
Referenced by set_mmio_dev_ops(), and uart_enable().
Definition at line 8 of file aoac.c.
References AOAC_DEV_D3_CTL, aoac_read8(), aoac_write8(), FCH_AOAC_D0_INITIALIZED, FCH_AOAC_PWR_ON_DEV, and FCH_AOAC_TARGET_DEVICE_STATE.
Referenced by enable_aoac_devices(), and uart_enable().