enum | timestamp_id {
TS_ROMSTAGE_START = 1
, TS_INITRAM_START = 2
, TS_INITRAM_END = 3
, TS_ROMSTAGE_END = 4
,
TS_VBOOT_START = 5
, TS_VBOOT_END = 6
, TS_COPYRAM_START = 8
, TS_COPYRAM_END = 9
,
TS_RAMSTAGE_START = 10
, TS_BOOTBLOCK_START = 11
, TS_BOOTBLOCK_END = 12
, TS_COPYROM_START = 13
,
TS_COPYROM_END = 14
, TS_ULZMA_START = 15
, TS_ULZMA_END = 16
, TS_ULZ4F_START = 17
,
TS_ULZ4F_END = 18
, TS_DEVICE_ENUMERATE = 30
, TS_DEVICE_CONFIGURE = 40
, TS_DEVICE_ENABLE = 50
,
TS_DEVICE_INITIALIZE = 60
, TS_OPROM_INITIALIZE = 65
, TS_OPROM_COPY_END = 66
, TS_OPROM_END = 67
,
TS_DEVICE_DONE = 70
, TS_CBMEM_POST = 75
, TS_WRITE_TABLES = 80
, TS_FINALIZE_CHIPS = 85
,
TS_LOAD_PAYLOAD = 90
, TS_ACPI_WAKE_JUMP = 98
, TS_SELFBOOT_JUMP = 99
, TS_POSTCAR_START = 100
,
TS_POSTCAR_END = 101
, TS_DELAY_START = 110
, TS_DELAY_END = 111
, TS_READ_UCODE_START = 112
,
TS_READ_UCODE_END = 113
, TS_ELOG_INIT_START = 114
, TS_ELOG_INIT_END = 115
, TS_COPYVER_START = 501
,
TS_COPYVER_END = 502
, TS_TPMINIT_START = 503
, TS_TPMINIT_END = 504
, TS_VERIFY_SLOT_START = 505
,
TS_VERIFY_SLOT_END = 506
, TS_HASH_BODY_START = 507
, TS_LOADING_END = 508
, TS_HASHING_END = 509
,
TS_HASH_BODY_END = 510
, TS_TPMPCR_START = 511
, TS_TPMPCR_END = 512
, TS_TPMLOCK_START = 513
,
TS_TPMLOCK_END = 514
, TS_EC_SYNC_START = 515
, TS_EC_HASH_READY = 516
, TS_EC_POWER_LIMIT_WAIT = 517
,
TS_EC_SYNC_END = 518
, TS_COPYVPD_START = 550
, TS_COPYVPD_RO_END = 551
, TS_COPYVPD_RW_END = 552
,
TS_TPM_ENABLE_UPDATE_START = 553
, TS_TPM_ENABLE_UPDATE_END = 554
, TS_AGESA_INIT_RESET_START = 900
, TS_AGESA_INIT_RESET_END = 901
,
TS_AGESA_INIT_EARLY_START = 902
, TS_AGESA_INIT_EARLY_END = 903
, TS_AGESA_INIT_POST_START = 904
, TS_AGESA_INIT_POST_END = 905
,
TS_AGESA_INIT_ENV_START = 906
, TS_AGESA_INIT_ENV_END = 907
, TS_AGESA_INIT_MID_START = 908
, TS_AGESA_INIT_MID_END = 909
,
TS_AGESA_INIT_LATE_START = 910
, TS_AGESA_INIT_LATE_END = 911
, TS_AGESA_INIT_RTB_START = 912
, TS_AGESA_INIT_RTB_END = 913
,
TS_AGESA_INIT_RESUME_START = 914
, TS_AGESA_INIT_RESUME_END = 915
, TS_AGESA_S3_LATE_START = 916
, TS_AGESA_S3_LATE_END = 917
,
TS_AGESA_S3_FINAL_START = 918
, TS_AGESA_S3_FINAL_END = 919
, TS_AMD_APOB_READ_START = 920
, TS_AMD_APOB_ERASE_START = 921
,
TS_AMD_APOB_WRITE_START = 922
, TS_AMD_APOB_END = 923
, TS_ME_INFORM_DRAM_START = 940
, TS_ME_INFORM_DRAM_END = 941
,
TS_ME_END_OF_POST_START = 942
, TS_ME_END_OF_POST_END = 943
, TS_ME_BOOT_STALL_END = 944
, TS_ME_ICC_CONFIG_START = 945
,
TS_ME_HOST_BOOT_PREP_END = 946
, TS_ME_RECEIVED_CRDA_FROM_PMC = 947
, TS_CSE_FW_SYNC_START = 948
, TS_CSE_FW_SYNC_END = 949
,
TS_FSP_MEMORY_INIT_START = 950
, TS_FSP_MEMORY_INIT_END = 951
, TS_FSP_TEMP_RAM_EXIT_START = 952
, TS_FSP_TEMP_RAM_EXIT_END = 953
,
TS_FSP_SILICON_INIT_START = 954
, TS_FSP_SILICON_INIT_END = 955
, TS_FSP_ENUMERATE_START = 956
, TS_FSP_ENUMERATE_END = 957
,
TS_FSP_FINALIZE_START = 958
, TS_FSP_FINALIZE_END = 959
, TS_FSP_END_OF_FIRMWARE_START = 960
, TS_FSP_END_OF_FIRMWARE_END = 961
,
TS_FSP_MULTI_PHASE_SI_INIT_START = 962
, TS_FSP_MULTI_PHASE_SI_INIT_END = 963
, TS_FSP_MEMORY_INIT_LOAD = 970
, TS_FSP_SILICON_INIT_LOAD = 971
,
TS_ME_ROM_START = 990
, TS_DC_START = 1000
, TS_RO_PARAMS_INIT = 1001
, TS_RO_VB_INIT = 1002
,
TS_RO_VB_SELECT_FIRMWARE = 1003
, TS_RO_VB_SELECT_AND_LOAD_KERNEL = 1004
, TS_RW_VB_SELECT_AND_LOAD_KERNEL = 1010
, TS_VB_SELECT_AND_LOAD_KERNEL = 1020
,
TS_VB_EC_VBOOT_DONE = 1030
, TS_VB_STORAGE_INIT_DONE = 1040
, TS_VB_READ_KERNEL_DONE = 1050
, TS_VB_VBOOT_DONE = 1100
,
TS_KERNEL_START = 1101
, TS_KERNEL_DECOMPRESSION = 1102
} |