coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
car.h
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/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef FSP1_1_CAR_H
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#define FSP1_1_CAR_H
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#include <fsp/api.h>
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/* Per stage calls from the above two functions. The void * return from
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* cache_as_ram_stage_main() is the stack pointer to use in RAM after
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* exiting cache-as-ram mode. */
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void
cache_as_ram_stage_main
(FSP_INFO_HEADER *fih);
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#endif
cache_as_ram_stage_main
void cache_as_ram_stage_main(FSP_INFO_HEADER *fih)
Definition:
romstage.c:95
src
drivers
intel
fsp1_1
include
fsp
car.h
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