coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <fsp/api.h>
Go to the source code of this file.
Functions | |
void | cache_as_ram_stage_main (FSP_INFO_HEADER *fih) |
void cache_as_ram_stage_main | ( | FSP_INFO_HEADER * | fih | ) |
Definition at line 95 of file romstage.c.
References BIOS_INFO, BIOS_SPEW, CONFIG, fill_power_state(), fsp_version, mainboard_pre_raminit(), params, post_code, print_fsp_info(), printk, raminit_common(), soc_after_ram_init(), timestamp_add_now(), and TS_ROMSTAGE_START.
Referenced by mainboard_romstage_entry().