coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
rtc_osc_init.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <soc/rtc.h>
4 #include <soc/rtc_common.h>
5 
6 /* 32k clock calibration */
7 static int rtc_eosc_cali(void)
8 {
9  u16 diff_left, diff_right, cksel;
10  u16 val = 0;
11  u16 middle;
12  u16 left = RTC_XOSCCALI_START;
13  u16 right = RTC_XOSCCALI_END;
14 
16  cksel &= ~PMIC_FQMTR_CKSEL_MASK;
17  /* select EOSC_32 as fixed clock */
20  rtc_info("PMIC_RG_FQMTR_CKSEL=%#x\n", cksel);
21 
22  while (left <= right) {
23  middle = (right + left) / 2;
24  if (middle == left)
25  break;
26 
27  /* select 26M as target clock */
30  break;
31 
33  right = middle;
34  else
35  left = middle;
36  }
37 
39  return middle;
40 
42  diff_left = ABS(val - RTC_FQMTR_LOW_BASE);
43 
45  diff_right = ABS(val - RTC_FQMTR_LOW_BASE);
46 
47  rtc_info("left: %d, middle: %d, right: %d\n", left, middle, right);
48  if (diff_left < diff_right)
49  return left;
50  else
51  return right;
52 }
53 
54 void rtc_osc_init(void)
55 {
56  u16 osc32con;
57 
58  /* enable 32K export */
59  rtc_gpio_init();
60  /* calibrate eosc32 for powerdown clock */
61  rtc_read(RTC_OSC32CON, &osc32con);
62  rtc_info("osc32con val = %#x\n", osc32con);
63  osc32con &= ~RTC_XOSCCALI_MASK;
64  osc32con |= rtc_eosc_cali() & RTC_XOSCCALI_MASK;
65  rtc_xosc_write(osc32con);
66  rtc_info("EOSC32 cali val = %#x\n", osc32con);
67 }
#define ABS(a)
Definition: helpers.h:44
#define rtc_info(fmt, arg ...)
Definition: rtc_common.h:12
bool rtc_xosc_write(u16 val)
Definition: rtc.c:74
void rtc_read(u16 addr, u16 *rdata)
Definition: rtc_mt6359p.c:14
u16 rtc_get_frequency_meter(u16 val, u16 measure_src, u16 window_size)
Definition: rtc_mt6359p.c:87
bool rtc_gpio_init(void)
Definition: rtc_mt6359p.c:71
void rtc_write(u16 addr, u16 wdata)
Definition: rtc_mt6359p.c:25
void rtc_osc_init(void)
Definition: rtc_osc_init.c:54
static int rtc_eosc_cali(void)
Definition: rtc_osc_init.c:7
@ RTC_OSC32CON
Definition: rtc.h:42
@ RTC_XOSCCALI_MASK
Definition: rtc.h:92
@ PMIC_RG_FQMTR_CKSEL
Definition: rtc.h:158
@ RTC_FQMTR_LOW_BASE
Definition: rtc.h:197
@ RTC_FQMTR_HIGH_BASE
Definition: rtc.h:198
@ PMIC_FQMTR_CON0_FQM26M_CK
Definition: rtc.h:187
@ PMIC_FQMTR_FIX_CLK_EOSC_32K
Definition: rtc.h:170
@ PMIC_FQMTR_CKSEL_MASK
Definition: rtc.h:175
@ RTC_XOSCCALI_START
Definition: rtc.h:202
@ RTC_XOSCCALI_END
Definition: rtc.h:203
uint16_t u16
Definition: stdint.h:48
u8 val
Definition: sys.c:300