coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
mainboard.c
Go to the documentation of this file.
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <baseboard/variants.h>
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#include <
bootstate.h
>
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#include <gpio.h>
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#include <
intelblocks/pcr.h
>
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#include <soc/gpio.h>
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#include <soc/pcr_ids.h>
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void
variant_mainboard_final
(
void
)
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{
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/* PIR8 register mapping for PCIe root ports
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INTA#->PIRQC#, INTB#->PIRQD#, INTC#->PIRQA#, INTD#-> PIRQB# */
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pcr_write16
(
PID_ITSS
, 0x3150, 0x1032);
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}
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static
void
finalize_boot
(
void
*unused)
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{
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/* Set coreboot ready LED. */
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gpio_output
(
GPP_F20
, 1);
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}
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BOOT_STATE_INIT_ENTRY
(
BS_PAYLOAD_BOOT
,
BS_ON_ENTRY
,
finalize_boot
,
NULL
);
GPP_F20
#define GPP_F20
Definition:
gpio_soc_defs.h:593
bootstate.h
BS_PAYLOAD_BOOT
@ BS_PAYLOAD_BOOT
Definition:
bootstate.h:89
BS_ON_ENTRY
@ BS_ON_ENTRY
Definition:
bootstate.h:95
pcr.h
pcr_write16
void pcr_write16(uint8_t pid, uint16_t offset, uint16_t indata)
Definition:
pcr.c:134
BOOT_STATE_INIT_ENTRY
BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_EXIT, sch5545_ec_hwm_init, NULL)
PID_ITSS
@ PID_ITSS
Definition:
pcr.h:16
gpio_output
void gpio_output(gpio_t gpio, int value)
Definition:
gpio.c:194
variant_mainboard_final
void __weak variant_mainboard_final(void)
Definition:
mainboard.c:245
finalize_boot
static void finalize_boot(void *unused)
Definition:
mainboard.c:17
NULL
#define NULL
Definition:
stddef.h:19
src
mainboard
siemens
mc_ehl
variants
mc_ehl2
mainboard.c
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