coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
chip.h
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <device/device.h>
4 
5 #ifndef _IMPI_CHIP_H_
6 #define _IPMI_CHIP_H_
7 
8 #include <stdint.h>
9 
18  /* Device to use for GPIO operations */
20  /*
21  * Jumper GPIO for enabling / disabling BMC/IPMI
22  * If present, the jumper overrides the devicetree.
23  */
25  /* "POST complete" GPIO and polarity */
28  /*
29  * Wait for BMC to boot.
30  * This can be used if the BMC takes a long time to boot after PoR:
31  * AST2400 on Supermicro X11SSH: 34 s
32  */
34  /*
35  * The timeout in seconds to wait for the IPMI service to be loaded.
36  * Will be used if wait_for_bmc is true.
37  */
39  unsigned int uid; /* Auto-filled by ipmi_ssdt() */
40 };
41 
42 #endif /* _IMPI_CHIP_H_ */
#define DEVTREE_CONST
Definition: stddef.h:30
uint32_t u32
Definition: stdint.h:51
uint16_t u16
Definition: stdint.h:48
uint8_t u8
Definition: stdint.h:45
Definition: device.h:107
u8 bmc_i2c_address
Definition: chip.h:11
unsigned int uid
Definition: chip.h:39
bool wait_for_bmc
Definition: chip.h:33
u32 post_complete_gpio
Definition: chip.h:26
bool post_complete_invert
Definition: chip.h:27
DEVTREE_CONST struct device * gpio_dev
Definition: chip.h:19
u8 nv_storage_device_address
Definition: chip.h:13
u16 bmc_boot_timeout
Definition: chip.h:38
u8 have_nv_storage
Definition: chip.h:12
u32 apic_interrupt
Definition: chip.h:17
u32 bmc_jumper_gpio
Definition: chip.h:24