coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
spi_reg_delay0 Union Reference

#include <spi_internal.h>

Collaboration diagram for spi_reg_delay0:
Collaboration graph

Data Fields

struct {
   uint32_t   cssck: 8
 
   uint32_t   reserved0: 8
 
   uint32_t   sckcs: 8
 
   uint32_t   reserved1: 8
 
}; 
 
uint32_t raw_bits
 

Detailed Description

Definition at line 34 of file spi_internal.h.

Field Documentation

◆ 

struct { ... }

◆ cssck

uint32_t spi_reg_delay0::cssck

Definition at line 36 of file spi_internal.h.

◆ raw_bits

uint32_t spi_reg_delay0::raw_bits

Definition at line 41 of file spi_internal.h.

◆ reserved0

uint32_t spi_reg_delay0::reserved0

Definition at line 37 of file spi_internal.h.

◆ reserved1

uint32_t spi_reg_delay0::reserved1

Definition at line 39 of file spi_internal.h.

◆ sckcs

uint32_t spi_reg_delay0::sckcs

Definition at line 38 of file spi_internal.h.


The documentation for this union was generated from the following file: