35 .dqs_map[
DDR_CH0] = {3, 0, 1, 2, 7, 4, 5, 6},
36 .dqs_map[
DDR_CH1] = {3, 0, 1, 2, 7, 4, 5, 6},
39 .rcomp_resistor = {100, 100, 100},
41 .rcomp_targets = {60, 40, 30, 20, 30},
const struct mb_cfg *__weak variant_memcfg_config(void)
static const struct mb_cfg ehlcrb_lpddr4x_memcfg_cfg