coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
w83627ehg.h
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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#ifndef SUPERIO_WINBOND_W83627EHG_H
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#define SUPERIO_WINBOND_W83627EHG_H
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#define W83627EHG_FDC 0
/* Floppy */
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#define W83627EHG_PP 1
/* Parallel port */
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#define W83627EHG_SP1 2
/* Com1 */
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#define W83627EHG_SP2 3
/* Com2 */
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#define W83627EHG_KBC 5
/* PS/2 keyboard & mouse */
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#define W83627EHG_WDTO_PLED 8
/* Watchdog timer timeout, power LED */
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#define W83627EHG_ACPI 10
/* ACPI */
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#define W83627EHG_HWM 11
/* Hardware monitor */
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/* The following are handled using "virtual LDNs" (hence the _V suffix). */
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#define W83627EHG_SFI_V 6
/* Serial flash interface (SFI) */
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#define W83627EHG_GPIO_GAME_MIDI_V 7
/* GPIO1, GPIO6, game port, MIDI */
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#define W83627EHG_GPIO_SUSLED_V 9
/* GPIO2, GPIO3, GPIO4, GPIO5, SUSLED */
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/*
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* Virtual devices sharing the enables are encoded as follows:
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* VLDN = baseLDN[7:0] | [10:8] bitpos of enable in 0x30 of baseLDN
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*/
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/* SFI has bit 1 as enable (instead of bit 0 as usual). */
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#define W83627EHG_SFI ((1 << 8) | W83627EHG_SFI_V)
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#define W83627EHG_GPIO1 ((0 << 8) | W83627EHG_GPIO_GAME_MIDI_V)
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#define W83627EHG_GAME ((1 << 8) | W83627EHG_GPIO_GAME_MIDI_V)
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#define W83627EHG_MIDI ((2 << 8) | W83627EHG_GPIO_GAME_MIDI_V)
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#define W83627EHG_GPIO6 ((3 << 8) | W83627EHG_GPIO_GAME_MIDI_V)
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#define W83627EHG_GPIO2 ((0 << 8) | W83627EHG_GPIO_SUSLED_V)
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#define W83627EHG_GPIO3 ((1 << 8) | W83627EHG_GPIO_SUSLED_V)
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#define W83627EHG_GPIO4 ((2 << 8) | W83627EHG_GPIO_SUSLED_V)
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#define W83627EHG_GPIO5 ((3 << 8) | W83627EHG_GPIO_SUSLED_V)
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#endif
/* SUPERIO_WINBOND_W83627EHG_H */
src
superio
winbond
w83627ehg
w83627ehg.h
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