coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
pmic.h
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #ifndef __MAINBOARD_GOOGLE_FOSTER_PMIC_H__
4 #define __MAINBOARD_GOOGLE_FOSTER_PMIC_H__
5 
6 #include <stdint.h>
7 
8 #define MAX77620_SD0_REG 0x16
9 #define MAX77620_SD1_REG 0x17
10 #define MAX77620_SD2_REG 0x18
11 #define MAX77620_SD3_REG 0x19
12 #define MAX77620_VDVSSD0_REG 0x1B
13 #define MAX77620_CNFG2SD_REG 0x22
14 
15 #define MAX77620_CNFG1_L0_REG 0x23
16 #define MAX77620_CNFG2_L0_REG 0x24
17 #define MAX77620_CNFG1_L1_REG 0x25
18 #define MAX77620_CNFG2_L1_REG 0x26
19 #define MAX77620_CNFG1_L2_REG 0x27
20 #define MAX77620_CNFG2_L2_REG 0x28
21 #define MAX77620_CNFG1_L3_REG 0x29
22 #define MAX77620_CNFG2_L3_REG 0x2A
23 #define MAX77620_CNFG1_L4_REG 0x2B
24 #define MAX77620_CNFG2_L4_REG 0x2C
25 #define MAX77620_CNFG1_L5_REG 0x2D
26 #define MAX77620_CNFG2_L5_REG 0x2E
27 #define MAX77620_CNFG1_L6_REG 0x2F
28 #define MAX77620_CNFG2_L6_REG 0x30
29 #define MAX77620_CNFG1_L7_REG 0x31
30 #define MAX77620_CNFG2_L7_REG 0x32
31 #define MAX77620_CNFG1_L8_REG 0x33
32 #define MAX77620_CNFG2_L8_REG 0x34
33 #define MAX77620_CNFG3_LDO_REG 0x35
34 
35 #define MAX77620_GPIO0_REG 0x36
36 #define MAX77620_GPIO1_REG 0x37
37 #define MAX77620_GPIO2_REG 0x38
38 #define MAX77620_GPIO3_REG 0x39
39 #define MAX77620_GPIO4_REG 0x3A
40 #define MAX77620_GPIO5_REG 0x3B
41 #define MAX77620_GPIO6_REG 0x3C
42 #define MAX77620_GPIO7_REG 0x3D
43 #define MAX77620_GPIO_PUE_GPIO 0x3E
44 #define MAX77620_GPIO_PDE_GPIO 0x3F
45 
46 #define MAX77620_AME_GPIO 0x40
47 #define MAX77620_REG_ONOFF_CFG1 0x41
48 #define MAX77620_REG_ONOFF_CFG2 0x42
49 
50 #define MAX77620_CID0_REG 0x58
51 #define MAX77620_CID1_REG 0x59
52 #define MAX77620_CID2_REG 0x5A
53 #define MAX77620_CID3_REG 0x5B
54 #define MAX77620_CID4_REG 0x5C
55 #define MAX77620_CID5_REG 0x5D
56 
57 #define MAX77621_VOUT_REG 0x00
58 #define MAX77621_VOUT_DVC_REG 0x01
59 #define MAX77621_CONTROL1_REG 0x02
60 #define MAX77621_CONTROL2_REG 0x03
61 
62 void pmic_init(unsigned int bus);
63 void pmic_write_reg_77620(unsigned int bus, uint8_t reg, uint8_t val,
64  int delay);
65 
66 #endif /* __MAINBOARD_GOOGLE_FOSTER_PMIC_H__ */
void delay(unsigned int secs)
Definition: delay.c:8
void pmic_init(unsigned int bus)
Definition: pmic.c:34
void pmic_write_reg_77620(unsigned int bus, uint8_t reg, uint8_t val, int delay)
Definition: pmic.c:37
unsigned char uint8_t
Definition: stdint.h:8
Definition: device.h:76
u8 val
Definition: sys.c:300