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Data Fields
southbridge_intel_i82801ix_config Struct Reference

#include <chip.h>

Collaboration diagram for southbridge_intel_i82801ix_config:
Collaboration graph

Data Fields

uint8_t pirqa_routing
 Interrupt Routing configuration If bit7 is 1, the interrupt is disabled. More...
 
uint8_t pirqb_routing
 
uint8_t pirqc_routing
 
uint8_t pirqd_routing
 
uint8_t pirqe_routing
 
uint8_t pirqf_routing
 
uint8_t pirqg_routing
 
uint8_t pirqh_routing
 
uint8_t gpi0_routing
 GPI Routing configuration. More...
 
uint8_t gpi1_routing
 
uint8_t gpi2_routing
 
uint8_t gpi3_routing
 
uint8_t gpi4_routing
 
uint8_t gpi5_routing
 
uint8_t gpi6_routing
 
uint8_t gpi7_routing
 
uint8_t gpi8_routing
 
uint8_t gpi9_routing
 
uint8_t gpi10_routing
 
uint8_t gpi11_routing
 
uint8_t gpi12_routing
 
uint8_t gpi13_routing
 
uint8_t gpi14_routing
 
uint8_t gpi15_routing
 
uint32_t gpe0_en
 
uint16_t alt_gp_smi_en
 
uint8_t sata_port_map: 6
 
unsigned int sata_clock_request: 1
 
unsigned int sata_traffic_monitor: 1
 
unsigned int c4onc3_enable:1
 
unsigned int c5_enable: 1
 
unsigned int c6_enable: 1
 
unsigned int throttle_duty: 3
 
unsigned int pcie_slot_implemented: 6
 
struct {
   uint8_t   value: 8
 
   uint8_t   scale: 2
 
} pcie_power_limits [6]
 
uint8_t pcie_hotplug_map [8]
 
uint32_t gen1_dec
 
uint32_t gen2_dec
 
uint32_t gen3_dec
 
uint32_t gen4_dec
 

Detailed Description

Definition at line 13 of file chip.h.

Field Documentation

◆ alt_gp_smi_en

uint16_t southbridge_intel_i82801ix_config::alt_gp_smi_en

Definition at line 54 of file chip.h.

◆ c4onc3_enable

unsigned int southbridge_intel_i82801ix_config::c4onc3_enable

Definition at line 61 of file chip.h.

◆ c5_enable

unsigned int southbridge_intel_i82801ix_config::c5_enable

Definition at line 62 of file chip.h.

◆ c6_enable

unsigned int southbridge_intel_i82801ix_config::c6_enable

Definition at line 63 of file chip.h.

◆ gen1_dec

uint32_t southbridge_intel_i82801ix_config::gen1_dec

Definition at line 79 of file chip.h.

◆ gen2_dec

uint32_t southbridge_intel_i82801ix_config::gen2_dec

Definition at line 80 of file chip.h.

◆ gen3_dec

uint32_t southbridge_intel_i82801ix_config::gen3_dec

Definition at line 81 of file chip.h.

◆ gen4_dec

uint32_t southbridge_intel_i82801ix_config::gen4_dec

Definition at line 82 of file chip.h.

◆ gpe0_en

uint32_t southbridge_intel_i82801ix_config::gpe0_en

Definition at line 53 of file chip.h.

◆ gpi0_routing

uint8_t southbridge_intel_i82801ix_config::gpi0_routing

GPI Routing configuration.

Only the lower two bits have a meaning: 00: No effect 01: SMI# (if corresponding ALT_GPI_SMI_EN bit is also set) 10: SCI (if corresponding GPIO_EN bit is also set) 11: reserved

Definition at line 36 of file chip.h.

◆ gpi10_routing

uint8_t southbridge_intel_i82801ix_config::gpi10_routing

Definition at line 46 of file chip.h.

◆ gpi11_routing

uint8_t southbridge_intel_i82801ix_config::gpi11_routing

Definition at line 47 of file chip.h.

◆ gpi12_routing

uint8_t southbridge_intel_i82801ix_config::gpi12_routing

Definition at line 48 of file chip.h.

◆ gpi13_routing

uint8_t southbridge_intel_i82801ix_config::gpi13_routing

Definition at line 49 of file chip.h.

◆ gpi14_routing

uint8_t southbridge_intel_i82801ix_config::gpi14_routing

Definition at line 50 of file chip.h.

◆ gpi15_routing

uint8_t southbridge_intel_i82801ix_config::gpi15_routing

Definition at line 51 of file chip.h.

◆ gpi1_routing

uint8_t southbridge_intel_i82801ix_config::gpi1_routing

Definition at line 37 of file chip.h.

◆ gpi2_routing

uint8_t southbridge_intel_i82801ix_config::gpi2_routing

Definition at line 38 of file chip.h.

◆ gpi3_routing

uint8_t southbridge_intel_i82801ix_config::gpi3_routing

Definition at line 39 of file chip.h.

◆ gpi4_routing

uint8_t southbridge_intel_i82801ix_config::gpi4_routing

Definition at line 40 of file chip.h.

◆ gpi5_routing

uint8_t southbridge_intel_i82801ix_config::gpi5_routing

Definition at line 41 of file chip.h.

◆ gpi6_routing

uint8_t southbridge_intel_i82801ix_config::gpi6_routing

Definition at line 42 of file chip.h.

◆ gpi7_routing

uint8_t southbridge_intel_i82801ix_config::gpi7_routing

Definition at line 43 of file chip.h.

◆ gpi8_routing

uint8_t southbridge_intel_i82801ix_config::gpi8_routing

Definition at line 44 of file chip.h.

◆ gpi9_routing

uint8_t southbridge_intel_i82801ix_config::gpi9_routing

Definition at line 45 of file chip.h.

◆ pcie_hotplug_map

uint8_t southbridge_intel_i82801ix_config::pcie_hotplug_map[8]

Definition at line 76 of file chip.h.

◆ 

struct { ... } southbridge_intel_i82801ix_config::pcie_power_limits[6]

◆ pcie_slot_implemented

unsigned int southbridge_intel_i82801ix_config::pcie_slot_implemented

Definition at line 68 of file chip.h.

◆ pirqa_routing

uint8_t southbridge_intel_i82801ix_config::pirqa_routing

Interrupt Routing configuration If bit7 is 1, the interrupt is disabled.

Definition at line 18 of file chip.h.

◆ pirqb_routing

uint8_t southbridge_intel_i82801ix_config::pirqb_routing

Definition at line 19 of file chip.h.

◆ pirqc_routing

uint8_t southbridge_intel_i82801ix_config::pirqc_routing

Definition at line 20 of file chip.h.

◆ pirqd_routing

uint8_t southbridge_intel_i82801ix_config::pirqd_routing

Definition at line 21 of file chip.h.

◆ pirqe_routing

uint8_t southbridge_intel_i82801ix_config::pirqe_routing

Definition at line 22 of file chip.h.

◆ pirqf_routing

uint8_t southbridge_intel_i82801ix_config::pirqf_routing

Definition at line 23 of file chip.h.

◆ pirqg_routing

uint8_t southbridge_intel_i82801ix_config::pirqg_routing

Definition at line 24 of file chip.h.

◆ pirqh_routing

uint8_t southbridge_intel_i82801ix_config::pirqh_routing

Definition at line 25 of file chip.h.

◆ sata_clock_request

unsigned int southbridge_intel_i82801ix_config::sata_clock_request

Definition at line 58 of file chip.h.

◆ sata_port_map

uint8_t southbridge_intel_i82801ix_config::sata_port_map

Definition at line 57 of file chip.h.

◆ sata_traffic_monitor

unsigned int southbridge_intel_i82801ix_config::sata_traffic_monitor

Definition at line 59 of file chip.h.

◆ scale

uint8_t southbridge_intel_i82801ix_config::scale

Definition at line 73 of file chip.h.

◆ throttle_duty

unsigned int southbridge_intel_i82801ix_config::throttle_duty

Definition at line 65 of file chip.h.

◆ value

uint8_t southbridge_intel_i82801ix_config::value

Definition at line 72 of file chip.h.

The documentation for this struct was generated from the following file: