coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
sata.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <acpi/acpigen.h>
4 #include <acpi/acpi_sata.h>
5 
6 /* e.g.
7  * generate_sata_ssdt_ports("\_SB.PCI0.SATA", 0x3);
8  * generates:
9  * Scope (\_SB.PCI0.SATA)
10  * {
11  * Device (PR00)
12  * {
13  * Name (_ADR, 0x0000FFFF) // _ADR: Address
14  * }
15  *
16  * Device (PR01)
17  * {
18  * Name (_ADR, 0x0001FFFF) // _ADR: Address
19  * }
20  * }
21  *
22  */
23 void generate_sata_ssdt_ports(const char *scope, uint32_t enable_map)
24 {
25  int i;
26  uint32_t bit;
27  char port_name[4] = "PR00";
28 
29  acpigen_write_scope(scope);
30 
31  /* generate a device for every enabled port */
32  for (i = 0; i < 32; i++) {
33  bit = 1 << i;
34  if (!(bit & enable_map))
35  continue;
36 
37  port_name[2] = '0' + i / 10;
38  port_name[3] = '0' + i % 10;
39 
40  acpigen_write_device(port_name);
41 
42  acpigen_write_name_dword("_ADR", 0xffff + i * 0x10000);
43  acpigen_pop_len(); /* close PRT%d */
44  }
45 
46  acpigen_pop_len(); /* close scope */
47 }
void generate_sata_ssdt_ports(const char *scope, uint32_t enable_map)
Definition: sata.c:23
void acpigen_pop_len(void)
Definition: acpigen.c:37
void acpigen_write_scope(const char *name)
Definition: acpigen.c:326
void acpigen_write_name_dword(const char *name, uint32_t val)
Definition: acpigen.c:158
void acpigen_write_device(const char *name)
Definition: acpigen.c:769
unsigned int uint32_t
Definition: stdint.h:14