coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
common.h
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1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 
3 #ifndef DEVICE_DRAM_COMMON_H
4 #define DEVICE_DRAM_COMMON_H
5 
6 #include <console/console.h>
7 #include <stdint.h>
8 
9 /**
10  * \brief Convenience definitions for TCK values
11  *
12  * Different values for tCK, representing standard DDR3 frequencies.
13  * These values are in 1/256 ns units.
14  * @{
15  */
16 #define NS2MHZ_DIV256 (1000 << 8)
17 
18 #define TCK_1333MHZ 192
19 #define TCK_1200MHZ 212
20 #define TCK_1100MHZ 232
21 #define TCK_1066MHZ 240
22 #define TCK_1000MHZ 256
23 #define TCK_933MHZ 274
24 #define TCK_900MHZ 284
25 #define TCK_800MHZ 320
26 #define TCK_700MHZ 365
27 #define TCK_666MHZ 384
28 #define TCK_533MHZ 480
29 #define TCK_400MHZ 640
30 #define TCK_333MHZ 768
31 #define TCK_266MHZ 960
32 #define TCK_200MHZ 1280
33 /** @} */
34 
35 /**
36  * \brief Convenience macro for enabling printk with CONFIG(DEBUG_RAM_SETUP)
37  *
38  * Use this macro instead of printk(); for verbose RAM initialization messages.
39  * When CONFIG(DEBUG_RAM_SETUP) is not selected, these messages are automatically
40  * disabled.
41  * @{
42  */
43 #if CONFIG(DEBUG_RAM_SETUP)
44 #define printram(x, ...) printk(BIOS_DEBUG, x, ##__VA_ARGS__)
45 #else
46 #define printram(x, ...)
47 #endif
48 /** @} */
49 
50 /** Result of the SPD decoding process */
51 enum spd_status {
56 };
57 
58 u16 ddr_crc16(const u8 *ptr, int n_crc);
59 
60 #endif /* DEVICE_DRAM_COMMON_H */
u16 ddr_crc16(const u8 *ptr, int n_crc)
Calculate the CRC of a DDR SPD data.
Definition: ddr_common.c:14
spd_status
Result of the SPD decoding process.
Definition: common.h:51
@ SPD_STATUS_CRC_ERROR
Definition: common.h:54
@ SPD_STATUS_INVALID_FIELD
Definition: common.h:55
@ SPD_STATUS_INVALID
Definition: common.h:53
@ SPD_STATUS_OK
Definition: common.h:52
uint16_t u16
Definition: stdint.h:48
uint8_t u8
Definition: stdint.h:45