#include <chip.h>
Definition at line 8 of file chip.h.
◆ enable_native_ide
int southbridge_intel_i82801dx_config::enable_native_ide |
◆ enable_usb
int southbridge_intel_i82801dx_config::enable_usb |
Definition at line 9 of file chip.h.
◆ ide0_enable
uint8_t southbridge_intel_i82801dx_config::ide0_enable |
◆ ide1_enable
uint8_t southbridge_intel_i82801dx_config::ide1_enable |
◆ pirqa_routing
uint8_t southbridge_intel_i82801dx_config::pirqa_routing |
Interrupt Routing configuration If bit7 is 1, the interrupt is disabled.
Definition at line 15 of file chip.h.
◆ pirqb_routing
uint8_t southbridge_intel_i82801dx_config::pirqb_routing |
◆ pirqc_routing
uint8_t southbridge_intel_i82801dx_config::pirqc_routing |
◆ pirqd_routing
uint8_t southbridge_intel_i82801dx_config::pirqd_routing |
◆ pirqe_routing
uint8_t southbridge_intel_i82801dx_config::pirqe_routing |
◆ pirqf_routing
uint8_t southbridge_intel_i82801dx_config::pirqf_routing |
◆ pirqg_routing
uint8_t southbridge_intel_i82801dx_config::pirqg_routing |
◆ pirqh_routing
uint8_t southbridge_intel_i82801dx_config::pirqh_routing |
The documentation for this struct was generated from the following file:
- src/southbridge/intel/i82801dx/chip.h