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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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Go to the source code of this file.
Functions | |
void | spiconsole_init (void) |
void | spiconsole_tx_byte (unsigned char c) |
Variables | |
static struct spi_slave | slave |
Definition at line 9 of file spiconsole.c.
References slave, spi_init(), and spi_setup_slave().
Definition at line 25 of file spiconsole.c.
References c, em100_msg::data, EM100_DEDICATED_CMD, EM100_MSG_ASCII, EM100_MSG_SIGNATURE, EM100_UFIFO_CMD, em100_msg::header, MAX_MSG_LENGTH, em100_msg_header::msg_length, NULL, slave, em100_msg_header::spi_command, spi_crop_chunk(), and spi_xfer().
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Definition at line 1 of file spiconsole.c.
Referenced by boot_device_init(), crosec_spi_io(), do_transfer(), do_xfer(), eeprom_random_read(), exynos_spi_read(), fu540_spi_mmap(), fu540_spi_setup(), get_miso(), google_chromeec_command(), i2c_2ba_read_bytes(), i2c_read(), i2c_read_bytes(), i2c_read_raw(), i2c_readb(), i2c_write(), i2c_write_raw(), i2c_writeb(), intel_gmbus_read_edid(), mipi_dsi_enslave(), mipi_dsi_liberate(), mtk_i2c_should_combine(), mtk_spi_init(), platform_i2c_transfer(), probe_edid(), qup_spi_claim_bus(), qup_spi_release_bus(), qup_spi_xfer(), set_clk(), set_cs(), set_mosi(), set_slave_apc(), set_slave_noc_dapc(), setup_fifo_params(), smb_write_blk(), spi_claim_bus(), spi_claim_bus_(), spi_crop_chunk(), spi_cs_activate(), spi_cs_deactivate(), spi_ctrlr_claim_bus(), spi_ctrlr_release_bus(), spi_ctrlr_setup(), spi_ctrlr_xfer(), spi_qup_set_cs(), spi_release_bus(), spi_release_bus_(), spi_setup_slave(), spi_w8r8(), spi_xfer(), spi_xfer_(), spi_xfer_single_op(), spi_xfer_vector(), spi_xfer_vector_default(), spiconsole_init(), spiconsole_tx_byte(), tegra_spi_init(), to_cavium_spi(), to_exynos_spi(), to_ipq_spi(), to_mtk_spi(), to_qcs_spi(), to_rockchip_spi(), write_force_cs(), and xfer_vectors().