coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
mrc_wrapper.h
Go to the documentation of this file.
1
/* SPDX-License-Identifier: BSD-3-Clause */
2
#ifndef _MRC_WRAPPER_H_
3
#define _MRC_WRAPPER_H_
4
5
#define MRC_PARAMS_VER 5
6
7
#define NUM_CHANNELS 2
8
9
/* Provide generic x86 calling conventions. */
10
#define ABI_X86 __attribute((regparm(0)))
11
12
enum
{
13
DRAM_INFO_SPD_SMBUS
,
/* Use the typical SPD smbus access. */
14
DRAM_INFO_SPD_MEM
,
/* SPD info in memory. */
15
DRAM_INFO_DETAILED
,
/* Timing info not in SPD format. */
16
};
17
18
enum
dram_type
{
19
DRAM_DDR3
,
20
DRAM_DDR3L
,
21
DRAM_LPDDR3
,
22
};
23
24
/* Errors returned by the MRC wrapper. */
25
enum
mrc_wrapper_error
{
26
INVALID_VER
= -1,
27
INVALID_DRAM_TYPE
= -2,
28
INVALID_SLEEP_MODE
= -3,
29
PLATFORM_SETTINGS_FAIL
= -4,
30
DIMM_DETECTION_FAILURE
= -5,
31
MEMORY_CONFIG_FAILURE
= -6,
32
INVALID_CPU_ODT_SETTING
= -7,
33
INVALID_DRAM_ODT_SETTING
= -8,
34
};
35
36
struct
mrc_mainboard_params
{
37
int
dram_type
;
38
int
dram_info_location
;
/* DRAM_INFO_* */
39
int
dram_is_slotted
;
/* mobo has DRAM slots. */
40
/*
41
* The below ODT settings are only honored when !dram_is_slotted.
42
* Additionally, weaker_odt_settings being non-zero causes
43
* cpu_odt_value to not be honored as weaker_odt_settings have a
44
* special training path.
45
*/
46
int
weaker_odt_settings
;
47
/* Allowed settings: 60, 80, 100, 120, and 150. */
48
int
cpu_odt_value
;
49
/* Allowed settings: 60 and 120. */
50
int
dram_odt_value
;
51
int
spd_addrs
[
NUM_CHANNELS
];
52
void
*
dram_data
[
NUM_CHANNELS
];
/* SPD or Timing specific data. */
53
}
__packed
;
54
55
struct
mrc_params
{
56
/* Mainboard Inputs */
57
int
version
;
58
59
struct
mrc_mainboard_params
mainboard
;
60
61
void
ABI_X86
(*
console_out
)(
unsigned
char
byte);
62
63
int
prev_sleep_state
;
64
65
int
saved_data_size
;
66
const
void
*
saved_data
;
67
68
int
txe_size_mb
;
/* TXE memory size in megabytes. */
69
int
rmt_enabled
;
/* Enable RMT training + prints. */
70
int
io_hole_mb
;
/* Size of IO hole in MiB. */
71
72
/* Outputs */
73
void
*
txe_base_address
;
74
int
data_to_save_size
;
75
void
*
data_to_save
;
76
}
__packed
;
77
78
/* Call into wrapper. */
79
typedef
int
ABI_X86
(*
mrc_wrapper_entry_t
)(
struct
mrc_params
*);
80
81
#endif
/* _MRC_WRAPPER_H_ */
mrc_wrapper_error
mrc_wrapper_error
Definition:
mrc_wrapper.h:25
INVALID_DRAM_TYPE
@ INVALID_DRAM_TYPE
Definition:
mrc_wrapper.h:27
INVALID_CPU_ODT_SETTING
@ INVALID_CPU_ODT_SETTING
Definition:
mrc_wrapper.h:32
DIMM_DETECTION_FAILURE
@ DIMM_DETECTION_FAILURE
Definition:
mrc_wrapper.h:30
INVALID_VER
@ INVALID_VER
Definition:
mrc_wrapper.h:26
INVALID_SLEEP_MODE
@ INVALID_SLEEP_MODE
Definition:
mrc_wrapper.h:28
INVALID_DRAM_ODT_SETTING
@ INVALID_DRAM_ODT_SETTING
Definition:
mrc_wrapper.h:33
MEMORY_CONFIG_FAILURE
@ MEMORY_CONFIG_FAILURE
Definition:
mrc_wrapper.h:31
PLATFORM_SETTINGS_FAIL
@ PLATFORM_SETTINGS_FAIL
Definition:
mrc_wrapper.h:29
__packed
struct mrc_mainboard_params __packed
mrc_wrapper_entry_t
int ABI_X86(* mrc_wrapper_entry_t)(struct mrc_params *)
Definition:
mrc_wrapper.h:79
dram_type
dram_type
Definition:
mrc_wrapper.h:18
DRAM_DDR3
@ DRAM_DDR3
Definition:
mrc_wrapper.h:19
DRAM_DDR3L
@ DRAM_DDR3L
Definition:
mrc_wrapper.h:20
DRAM_LPDDR3
@ DRAM_LPDDR3
Definition:
mrc_wrapper.h:21
ABI_X86
#define ABI_X86
Definition:
mrc_wrapper.h:10
DRAM_INFO_DETAILED
@ DRAM_INFO_DETAILED
Definition:
mrc_wrapper.h:15
DRAM_INFO_SPD_MEM
@ DRAM_INFO_SPD_MEM
Definition:
mrc_wrapper.h:14
DRAM_INFO_SPD_SMBUS
@ DRAM_INFO_SPD_SMBUS
Definition:
mrc_wrapper.h:13
NUM_CHANNELS
#define NUM_CHANNELS
Definition:
mrc_wrapper.h:7
mrc_mainboard_params
Definition:
mrc_wrapper.h:36
mrc_mainboard_params::dram_info_location
int dram_info_location
Definition:
mrc_wrapper.h:38
mrc_mainboard_params::dram_odt_value
int dram_odt_value
Definition:
mrc_wrapper.h:50
mrc_mainboard_params::cpu_odt_value
int cpu_odt_value
Definition:
mrc_wrapper.h:48
mrc_mainboard_params::dram_data
void * dram_data[NUM_CHANNELS]
Definition:
mrc_wrapper.h:52
mrc_mainboard_params::weaker_odt_settings
int weaker_odt_settings
Definition:
mrc_wrapper.h:46
mrc_mainboard_params::dram_type
int dram_type
Definition:
mrc_wrapper.h:37
mrc_mainboard_params::dram_is_slotted
int dram_is_slotted
Definition:
mrc_wrapper.h:39
mrc_mainboard_params::spd_addrs
int spd_addrs[NUM_CHANNELS]
Definition:
mrc_wrapper.h:51
mrc_params
Definition:
mrc_wrapper.h:55
mrc_params::txe_size_mb
int txe_size_mb
Definition:
mrc_wrapper.h:68
mrc_params::data_to_save_size
int data_to_save_size
Definition:
mrc_wrapper.h:74
mrc_params::console_out
void ABI_X86(* console_out)(unsigned char byte)
Definition:
mrc_wrapper.h:61
mrc_params::rmt_enabled
int rmt_enabled
Definition:
mrc_wrapper.h:69
mrc_params::prev_sleep_state
int prev_sleep_state
Definition:
mrc_wrapper.h:63
mrc_params::saved_data
const void * saved_data
Definition:
mrc_wrapper.h:66
mrc_params::mainboard
struct mrc_mainboard_params mainboard
Definition:
mrc_wrapper.h:59
mrc_params::io_hole_mb
int io_hole_mb
Definition:
mrc_wrapper.h:70
mrc_params::txe_base_address
void * txe_base_address
Definition:
mrc_wrapper.h:73
mrc_params::saved_data_size
int saved_data_size
Definition:
mrc_wrapper.h:65
mrc_params::data_to_save
void * data_to_save
Definition:
mrc_wrapper.h:75
mrc_params::version
int version
Definition:
mrc_wrapper.h:57
src
soc
intel
baytrail
include
soc
mrc_wrapper.h
Generated by
1.9.1