coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
mrc_wrapper.h
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1 /* SPDX-License-Identifier: BSD-3-Clause */
2 #ifndef _MRC_WRAPPER_H_
3 #define _MRC_WRAPPER_H_
4 
5 #define MRC_PARAMS_VER 5
6 
7 #define NUM_CHANNELS 2
8 
9 /* Provide generic x86 calling conventions. */
10 #define ABI_X86 __attribute((regparm(0)))
11 
12 enum {
13  DRAM_INFO_SPD_SMBUS, /* Use the typical SPD smbus access. */
14  DRAM_INFO_SPD_MEM, /* SPD info in memory. */
15  DRAM_INFO_DETAILED, /* Timing info not in SPD format. */
16 };
17 
18 enum dram_type {
22 };
23 
24 /* Errors returned by the MRC wrapper. */
34 };
35 
37  int dram_type;
38  int dram_info_location; /* DRAM_INFO_* */
39  int dram_is_slotted; /* mobo has DRAM slots. */
40  /*
41  * The below ODT settings are only honored when !dram_is_slotted.
42  * Additionally, weaker_odt_settings being non-zero causes
43  * cpu_odt_value to not be honored as weaker_odt_settings have a
44  * special training path.
45  */
47  /* Allowed settings: 60, 80, 100, 120, and 150. */
49  /* Allowed settings: 60 and 120. */
52  void *dram_data[NUM_CHANNELS]; /* SPD or Timing specific data. */
54 
55 struct mrc_params {
56  /* Mainboard Inputs */
57  int version;
58 
60 
61  void ABI_X86 (*console_out)(unsigned char byte);
62 
64 
66  const void *saved_data;
67 
68  int txe_size_mb; /* TXE memory size in megabytes. */
69  int rmt_enabled; /* Enable RMT training + prints. */
70  int io_hole_mb; /* Size of IO hole in MiB. */
71 
72  /* Outputs */
75  void *data_to_save;
76 } __packed;
77 
78 /* Call into wrapper. */
79 typedef int ABI_X86 (*mrc_wrapper_entry_t)(struct mrc_params *);
80 
81 #endif /* _MRC_WRAPPER_H_ */
mrc_wrapper_error
Definition: mrc_wrapper.h:25
@ INVALID_DRAM_TYPE
Definition: mrc_wrapper.h:27
@ INVALID_CPU_ODT_SETTING
Definition: mrc_wrapper.h:32
@ DIMM_DETECTION_FAILURE
Definition: mrc_wrapper.h:30
@ INVALID_VER
Definition: mrc_wrapper.h:26
@ INVALID_SLEEP_MODE
Definition: mrc_wrapper.h:28
@ INVALID_DRAM_ODT_SETTING
Definition: mrc_wrapper.h:33
@ MEMORY_CONFIG_FAILURE
Definition: mrc_wrapper.h:31
@ PLATFORM_SETTINGS_FAIL
Definition: mrc_wrapper.h:29
struct mrc_mainboard_params __packed
int ABI_X86(* mrc_wrapper_entry_t)(struct mrc_params *)
Definition: mrc_wrapper.h:79
dram_type
Definition: mrc_wrapper.h:18
@ DRAM_DDR3
Definition: mrc_wrapper.h:19
@ DRAM_DDR3L
Definition: mrc_wrapper.h:20
@ DRAM_LPDDR3
Definition: mrc_wrapper.h:21
#define ABI_X86
Definition: mrc_wrapper.h:10
@ DRAM_INFO_DETAILED
Definition: mrc_wrapper.h:15
@ DRAM_INFO_SPD_MEM
Definition: mrc_wrapper.h:14
@ DRAM_INFO_SPD_SMBUS
Definition: mrc_wrapper.h:13
#define NUM_CHANNELS
Definition: mrc_wrapper.h:7
void * dram_data[NUM_CHANNELS]
Definition: mrc_wrapper.h:52
int spd_addrs[NUM_CHANNELS]
Definition: mrc_wrapper.h:51
int txe_size_mb
Definition: mrc_wrapper.h:68
int data_to_save_size
Definition: mrc_wrapper.h:74
void ABI_X86(* console_out)(unsigned char byte)
Definition: mrc_wrapper.h:61
int rmt_enabled
Definition: mrc_wrapper.h:69
int prev_sleep_state
Definition: mrc_wrapper.h:63
const void * saved_data
Definition: mrc_wrapper.h:66
struct mrc_mainboard_params mainboard
Definition: mrc_wrapper.h:59
int io_hole_mb
Definition: mrc_wrapper.h:70
void * txe_base_address
Definition: mrc_wrapper.h:73
int saved_data_size
Definition: mrc_wrapper.h:65
void * data_to_save
Definition: mrc_wrapper.h:75