coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
power.h
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/* SPDX-License-Identifier: GPL-2.0-only */
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#ifndef __SOC_NVIDIA_TEGRA124_POWER_H__
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#define __SOC_NVIDIA_TEGRA124_POWER_H__
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// This function does not enable the external power to the rail, it enables
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// the rail itself internal to the SOC.
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void
power_enable_and_ungate_cpu
(
void
);
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// power_reset_status returns one of the following possible sources for the
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// most recent reset.
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enum
{
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POWER_RESET_POR
= 0,
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POWER_RESET_WATCHDOG
= 1,
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POWER_RESET_SENSOR
= 2,
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POWER_RESET_SW_MAIN
= 3,
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POWER_RESET_LP0
= 4
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};
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int
power_reset_status
(
void
);
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void
ram_repair
(
void
);
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#endif
/* __SOC_NVIDIA_TEGRA124_POWER_H__ */
power_reset_status
int power_reset_status(void)
Definition:
power.c:74
power_enable_and_ungate_cpu
void power_enable_and_ungate_cpu(void)
Definition:
power.c:52
POWER_RESET_SW_MAIN
@ POWER_RESET_SW_MAIN
Definition:
power.h:16
POWER_RESET_SENSOR
@ POWER_RESET_SENSOR
Definition:
power.h:15
POWER_RESET_LP0
@ POWER_RESET_LP0
Definition:
power.h:17
POWER_RESET_POR
@ POWER_RESET_POR
Definition:
power.h:13
POWER_RESET_WATCHDOG
@ POWER_RESET_WATCHDOG
Definition:
power.h:14
ram_repair
void ram_repair(void)
Definition:
tegra_lp0_resume.c:444
src
soc
nvidia
tegra124
include
soc
power.h
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