coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
xhci.c File Reference
#include <amdblocks/gpio.h>
#include <amdblocks/smi.h>
#include <bootstate.h>
#include <device/device.h>
#include <drivers/usb/pci_xhci/pci_xhci.h>
#include <soc/pci_devs.h>
#include <soc/smi.h>
#include <soc/soc_util.h>
Include dependency graph for xhci.c:

Go to the source code of this file.

Functions

enum cb_err pci_xhci_get_wake_gpe (const struct device *dev, int *gpe)
 
static void configure_xhci_sci (void *unused)
 
 BOOT_STATE_INIT_ENTRY (BS_POST_DEVICE, BS_ON_ENTRY, configure_xhci_sci, NULL)
 

Variables

static const struct sci_source xhci_sci_sources []
 

Function Documentation

◆ BOOT_STATE_INIT_ENTRY()

BOOT_STATE_INIT_ENTRY ( BS_POST_DEVICE  ,
BS_ON_ENTRY  ,
configure_xhci_sci  ,
NULL   
)

◆ configure_xhci_sci()

static void configure_xhci_sci ( void unused)
static

Definition at line 48 of file xhci.c.

References ARRAY_SIZE, gpe_configure_sci(), soc_is_reduced_io_sku(), and xhci_sci_sources.

Here is the call graph for this function:

◆ pci_xhci_get_wake_gpe()

enum cb_err pci_xhci_get_wake_gpe ( const struct device dev,
int *  gpe 
)

Variable Documentation

◆ xhci_sci_sources

const struct sci_source xhci_sci_sources[]
static
Initial value:
= {
{
.scimap = SMITYPE_XHC0_PME,
.gpe = GEVENT_31,
.direction = SMI_SCI_LVL_HIGH,
.level = SMI_SCI_EDG
},
{
.scimap = SMITYPE_XHC1_PME,
.gpe = GEVENT_31,
.direction = SMI_SCI_LVL_HIGH,
.level = SMI_SCI_EDG
}
}
#define SMITYPE_XHC1_PME
Definition: smi.h:103
#define SMITYPE_XHC0_PME
Definition: smi.h:102
#define GEVENT_31
Definition: gpio_defs.h:297
@ SMI_SCI_EDG
Definition: smi.h:28
@ SMI_SCI_LVL_HIGH
Definition: smi.h:24

Definition at line 1 of file xhci.c.

Referenced by configure_xhci_sci().