3 #ifndef __SOC_ROCKCHIP_RK3399_USB_H_
4 #define __SOC_ROCKCHIP_RK3399_USB_H_
6 #include <soc/addressmap.h>
9 #define DWC3_GSNPSID_MASK 0xffff0000
10 #define DWC3_GSNPSID_SHIFT 16
11 #define DWC3_GSNPSREV_MASK 0xffff
14 #define DWC3_GCTL_PWRDNSCALE(n) ((n) << 19)
15 #define DWC3_GCTL_U2RSTECN (1 << 16)
16 #define DWC3_GCTL_RAMCLKSEL(x) \
17 (((x) & DWC3_GCTL_CLK_MASK) << 6)
18 #define DWC3_GCTL_CLK_BUS (0)
19 #define DWC3_GCTL_CLK_PIPE (1)
20 #define DWC3_GCTL_CLK_PIPEHALF (2)
21 #define DWC3_GCTL_CLK_MASK (3)
22 #define DWC3_GCTL_PRTCAP_MASK (3 << 12)
23 #define DWC3_GCTL_PRTCAP_HOST (1 << 12)
24 #define DWC3_GCTL_PRTCAP_DEVICE (2 << 12)
25 #define DWC3_GCTL_PRTCAP_OTG (3 << 12)
26 #define DWC3_GCTL_CORESOFTRESET (1 << 11)
27 #define DWC3_GCTL_SCALEDOWN(n) ((n) << 4)
28 #define DWC3_GCTL_SCALEDOWN_MASK DWC3_GCTL_SCALEDOWN(3)
29 #define DWC3_GCTL_DISSCRAMBLE (1 << 3)
30 #define DWC3_GCTL_DSBLCLKGTNG (1 << 0)
33 #define DWC3_GHWPARAMS1_EN_PWROPT(n) (((n) & (3 << 24)) >> 24)
34 #define DWC3_GHWPARAMS1_EN_PWROPT_NO 0
35 #define DWC3_GHWPARAMS1_EN_PWROPT_CLK 1
38 #define DWC3_GUSB2PHYCFG_PHYSOFTRST (1 << 31)
39 #define DWC3_GUSB2PHYCFG_U2_FREECLK_EXISTS (1 << 30)
40 #define DWC3_GUSB2PHYCFG_USBTRDTIM(n) ((n) << 10)
41 #define DWC3_GUSB2PHYCFG_USB2TRDTIM_MASK DWC3_GUSB2PHYCFG_USBTRDTIM(0xf)
42 #define DWC3_GUSB2PHYCFG_SUSPHY (1 << 6)
43 #define DWC3_GUSB2PHYCFG_PHYIF(n) ((n) << 3)
44 #define DWC3_GUSB2PHYCFG_PHYIF_MASK DWC3_GUSB2PHYCFG_PHYIF(1)
45 #define USBTRDTIM_UTMI_8_BIT 9
46 #define USBTRDTIM_UTMI_16_BIT 5
49 #define DWC3_GUSB3PIPECTL_PHYSOFTRST (1 << 31)
50 #define DWC3_GUSB3PIPECTL_SUSPHY (1 << 17)
101 #define TCPHY_ISOLATION_CTRL_EN (1 << 15)
102 #define TCPHY_ISOLATION_CTRL_CMN_EN (1 << 14)
103 #define TCPHY_ISOLATION_CTRL_MODE_SEL (1 << 12)
104 #define TCPHY_ISOLATION_CTRL_LN_EN(ln) (1 << (ln))
105 #define TCPHY_CMN_HSCLK_PLL_CONFIG 0x30
106 #define TCPHY_CMN_HSCLK_PLL_MASK 0x33
#define USB_OTG0_TCPHY_BASE
#define USB_OTG0_DWC3_BASE
#define USB_OTG1_TCPHY_BASE
#define USB_OTG1_DWC3_BASE
static struct rk3399_tcphy *const rockchip_usb_otg0_phy
static struct rockchip_usb_dwc3 *const rockchip_usb_otg1_dwc3
static struct rk3399_tcphy *const rockchip_usb_otg1_phy
void setup_usb_otg0(void)
static struct rockchip_usb_dwc3 *const rockchip_usb_otg0_dwc3
void reset_usb_otg1(void)
void setup_usb_otg1(void)
void reset_usb_otg0(void)
unsigned long long uint64_t
uint32_t tx_rcvdet_st_tmr
uint8_t _res8[0x3207c - 0x32004]
uint32_t cmn_diag_hsclk_sel
uint32_t xcvr_diag_lane_fcm_en_mgn
uint8_t _res7[0x32000 - 0x12000]
uint8_t _res1[0x10000 - 0x784]
uint8_t _res4[0x488 - 0x40c]
uint8_t _res3[0x408 - 0x3cc]
uint32_t tx_rcvdet_en_tmr
uint8_t _res6[0x800 - 0x788]
uint8_t _res0[0x780 - 0x0]
uint8_t _res5[0x784 - 0x490]
uint8_t _res2[0x3c8 - 0x0]
struct rk3399_tcphy::@1524 lane[4]