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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <device/device.h>
#include <device/path.h>
#include <device/smbus.h>
#include <device/pci.h>
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <device/smbus_host.h>
#include <southbridge/intel/common/smbus_ops.h>
Go to the source code of this file.
Functions | |
static int | lsmbus_read_byte (struct device *dev, u8 address) |
static int | lsmbus_write_byte (struct device *dev, u8 address, u8 data) |
static int | lsmbus_block_write (struct device *dev, u8 cmd, u8 bytes, const u8 *buf) |
static int | lsmbus_block_read (struct device *dev, u8 cmd, u8 bytes, u8 *buf) |
void | smbus_read_resources (struct device *dev) |
Variables | |
struct smbus_bus_operations | lops_smbus_bus |
Definition at line 49 of file smbus_ops.c.
Definition at line 37 of file smbus_ops.c.
References resource::base, buf, bus::dev, i2c_path::device, device, do_smbus_block_write(), find_resource(), get_pbus_smbus(), device_path::i2c, device::path, and PCI_BASE_ADDRESS_4.
Definition at line 12 of file smbus_ops.c.
References address, resource::base, bus::dev, i2c_path::device, device, do_smbus_read_byte(), find_resource(), get_pbus_smbus(), device_path::i2c, device::path, and PCI_BASE_ADDRESS_4.
Definition at line 25 of file smbus_ops.c.
References address, resource::base, bus::dev, i2c_path::device, device, do_smbus_write_byte(), find_resource(), get_pbus_smbus(), device_path::i2c, device::path, and PCI_BASE_ADDRESS_4.
Definition at line 68 of file smbus_ops.c.
References resource::base, resource::flags, IORESOURCE_ASSIGNED, IORESOURCE_FIXED, IORESOURCE_IO, IORESOURCE_RESERVE, IORESOURCE_STORED, resource::limit, new_resource(), PCI_BASE_ADDRESS_4, pci_dev_read_resources(), and resource::size.
struct smbus_bus_operations lops_smbus_bus |
Definition at line 49 of file smbus_ops.c.