coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <device/device.h>
#include <device/pnp.h>
#include <superio/conf_mode.h>
#include <superio/hwm5_conf.h>
#include <console/console.h>
#include <pc80/keyboard.h>
#include <option.h>
#include "w83627hf.h"
Go to the source code of this file.
Functions | |
static void | enable_hwm_smbus (struct device *dev) |
static void | init_acpi (struct device *dev) |
static void | init_hwm (u16 base) |
static void | w83627hf_init (struct device *dev) |
static void | w83627hf_pnp_enable_resources (struct device *dev) |
static void | enable_dev (struct device *dev) |
Variables | |
static struct device_operations | ops |
static struct pnp_info | pnp_dev_info [] |
struct chip_operations | superio_winbond_w83627hf_ops |
Definition at line 126 of file superio.c.
References ARRAY_SIZE, ops, pnp_dev_info, and pnp_enable_devices().
Definition at line 13 of file superio.c.
References pnp_read_config(), and pnp_write_config().
Definition at line 23 of file superio.c.
References get_uint_option(), pnp_enter_conf_mode(), pnp_exit_conf_mode(), pnp_read_config(), pnp_set_logical_device(), pnp_write_config(), and value.
Referenced by w83627hf_init().
Definition at line 38 of file superio.c.
References ARRAY_SIZE, base, BIOS_DEBUG, pnp_read_hwm5_index(), pnp_write_hwm5_index(), printk, and value.
Referenced by w83627hf_init().
Definition at line 66 of file superio.c.
References resource::base, pnp_path::device, device::enabled, find_resource(), init_acpi(), init_hwm(), NO_AUX_DEVICE, device::path, pc_keyboard_init(), device_path::pnp, PNP_IDX_IO0, W83627HF_ACPI, W83627HF_HWM, and W83627HF_KBC.
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static |
Definition at line 87 of file superio.c.
Referenced by enable_dev().
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static |
Definition at line 87 of file superio.c.
Referenced by enable_dev().
struct chip_operations superio_winbond_w83627hf_ops |