coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
superio.c
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1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 
3 #include <device/device.h>
4 #include <device/pnp.h>
5 #include <superio/conf_mode.h>
6 #include <superio/hwm5_conf.h>
7 #include <console/console.h>
8 #include <pc80/keyboard.h>
9 #include <option.h>
10 
11 #include "w83627hf.h"
12 
13 static void enable_hwm_smbus(struct device *dev)
14 {
15  u8 reg8;
16 
17  /* Configure pins 91/92 as SDA/SCL (I2C bus). */
18  reg8 = pnp_read_config(dev, 0x2b);
19  reg8 &= 0x3f;
20  pnp_write_config(dev, 0x2b, reg8);
21 }
22 
23 static void init_acpi(struct device *dev)
24 {
25  u8 value;
26  unsigned int power_on = get_uint_option("power_on_after_fail", 1);
27 
30  value = pnp_read_config(dev, 0xE4);
31  value &= ~(3 << 5);
32  if (power_on)
33  value |= (1 << 5);
34  pnp_write_config(dev, 0xE4, value);
35  pnp_exit_conf_mode(dev);
36 }
37 
38 static void init_hwm(u16 base)
39 {
40  u8 reg, value;
41  int i;
42 
43  u8 hwm_reg_values[] = {
44  /* reg mask data */
45  0x40, 0xff, 0x81, /* Start HWM. */
46  0x48, 0xaa, 0x2a, /* Set SMBus base to 0x2a (0x54 >> 1). */
47  0x4a, 0x21, 0x21, /* Set T2 SMBus base to 0x92>>1 and T3 SMBus base to 0x94>>1. */
48  0x4e, 0x80, 0x00,
49  0x43, 0x00, 0xff,
50  0x44, 0x00, 0x3f,
51  0x4c, 0xbf, 0x18,
52  0x4d, 0xff, 0x80, /* Turn off beep */
53  };
54 
55  for (i = 0; i < ARRAY_SIZE(hwm_reg_values); i += 3) {
56  reg = hwm_reg_values[i];
58  value &= 0xff & hwm_reg_values[i + 1];
59  value |= 0xff & hwm_reg_values[i + 2];
60  printk(BIOS_DEBUG, "base = 0x%04x, reg = 0x%02x, "
61  "value = 0x%02x\n", base, reg, value);
63  }
64 }
65 
66 static void w83627hf_init(struct device *dev)
67 {
68  struct resource *res0;
69 
70  if (!dev->enabled)
71  return;
72 
73  switch (dev->path.pnp.device) {
74  case W83627HF_KBC:
76  break;
77  case W83627HF_HWM:
78  res0 = find_resource(dev, PNP_IDX_IO0);
79  init_hwm(res0->base);
80  break;
81  case W83627HF_ACPI:
82  init_acpi(dev);
83  break;
84  }
85 }
86 
87 static void w83627hf_pnp_enable_resources(struct device *dev)
88 {
90 
92  switch (dev->path.pnp.device) {
93  case W83627HF_HWM:
94  printk(BIOS_DEBUG, "W83627HF HWM SMBus enabled\n");
95  enable_hwm_smbus(dev);
96  break;
97  }
98  pnp_exit_conf_mode(dev);
99 }
100 
101 static struct device_operations ops = {
103  .set_resources = pnp_set_resources,
104  .enable_resources = w83627hf_pnp_enable_resources,
105  .enable = pnp_alt_enable,
106  .init = w83627hf_init,
107  .ops_pnp_mode = &pnp_conf_mode_8787_aa,
108 };
109 
110 static struct pnp_info pnp_dev_info[] = {
111  { NULL, W83627HF_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
112  { NULL, W83627HF_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x07f8, },
113  { NULL, W83627HF_SP1, PNP_IO0 | PNP_IRQ0, 0x07f8, },
114  { NULL, W83627HF_SP2, PNP_IO0 | PNP_IRQ0, 0x07f8, },
116  0x07ff, 0x07ff, },
117  { NULL, W83627HF_CIR, PNP_IO0 | PNP_IRQ0, 0x07f8, },
119  0x07ff, 0x07fe, },
120  { NULL, W83627HF_GPIO2, },
121  { NULL, W83627HF_GPIO3, },
122  { NULL, W83627HF_ACPI, },
123  { NULL, W83627HF_HWM, PNP_IO0 | PNP_IRQ0, 0x0ff8, },
124 };
125 
126 static void enable_dev(struct device *dev)
127 {
129 }
130 
132  CHIP_NAME("Winbond W83627HF Super I/O")
133  .enable_dev = enable_dev,
134 };
pte_t value
Definition: mmu.c:91
#define ARRAY_SIZE(a)
Definition: helpers.h:12
#define printk(level,...)
Definition: stdlib.h:16
const struct pnp_mode_ops pnp_conf_mode_8787_aa
Definition: conf_mode.c:202
struct resource * find_resource(const struct device *dev, unsigned int index)
Return an existing resource structure for a given index.
Definition: device_util.c:394
static u8 pnp_read_hwm5_index(u16 base, u8 reg)
Definition: hwm5_conf.h:26
static void pnp_write_hwm5_index(u16 base, u8 reg, u8 value)
Definition: hwm5_conf.h:43
#define CHIP_NAME(X)
Definition: device.h:32
uint8_t pc_keyboard_init(uint8_t probe_aux)
Definition: keyboard.c:229
#define NO_AUX_DEVICE
Definition: keyboard.h:6
#define BIOS_DEBUG
BIOS_DEBUG - Verbose output.
Definition: loglevel.h:128
unsigned int get_uint_option(const char *name, const unsigned int fallback)
Definition: option.c:116
#define PNP_IRQ1
Definition: pnp.h:48
#define PNP_DRQ0
Definition: pnp.h:49
#define PNP_IO1
Definition: pnp.h:43
#define PNP_IO0
Definition: pnp.h:42
#define PNP_IRQ0
Definition: pnp.h:47
#define PNP_IDX_IO0
Definition: pnp_def.h:5
void pnp_exit_conf_mode(struct device *dev)
Definition: pnp_device.c:17
void pnp_read_resources(struct device *dev)
Definition: pnp_device.c:114
void pnp_enable_devices(struct device *base_dev, struct device_operations *ops, unsigned int functions, struct pnp_info *info)
Definition: pnp_device.c:371
void pnp_set_logical_device(struct device *dev)
Definition: pnp_device.c:59
void pnp_set_resources(struct device *dev)
Definition: pnp_device.c:157
void pnp_alt_enable(struct device *dev)
Definition: pnp_device.c:191
u8 pnp_read_config(struct device *dev, u8 reg)
Definition: pnp_device.c:44
void pnp_enter_conf_mode(struct device *dev)
Definition: pnp_device.c:11
void pnp_write_config(struct device *dev, u8 reg, u8 value)
Definition: pnp_device.c:38
void pnp_enable_resources(struct device *dev)
Definition: pnp_device.c:173
uintptr_t base
Definition: uart.c:17
#define NULL
Definition: stddef.h:19
uint16_t u16
Definition: stdint.h:48
uint8_t u8
Definition: stdint.h:45
void(* read_resources)(struct device *dev)
Definition: device.h:39
struct pnp_path pnp
Definition: path.h:117
Definition: device.h:107
struct device_path path
Definition: device.h:115
unsigned int enabled
Definition: device.h:122
Definition: pnp.h:37
unsigned int device
Definition: path.h:59
resource_t base
Definition: resource.h:45
#define W83627HF_ACPI
Definition: w83627hf.h:15
#define W83627HF_FDC
Definition: w83627hf.h:6
#define W83627HF_CIR
Definition: w83627hf.h:11
#define W83627HF_GPIO2
Definition: w83627hf.h:13
#define W83627HF_GPIO3
Definition: w83627hf.h:14
#define W83627HF_SP2
Definition: w83627hf.h:9
#define W83627HF_KBC
Definition: w83627hf.h:10
#define W83627HF_HWM
Definition: w83627hf.h:16
#define W83627HF_PP
Definition: w83627hf.h:7
#define W83627HF_SP1
Definition: w83627hf.h:8
#define W83627HF_GAME_MIDI_GPIO1
Definition: w83627hf.h:12
struct chip_operations superio_winbond_w83627hf_ops
Definition: superio.c:131
static void init_hwm(u16 base)
Definition: superio.c:38
static void w83627hf_init(struct device *dev)
Definition: superio.c:66
static void enable_dev(struct device *dev)
Definition: superio.c:126
static void enable_hwm_smbus(struct device *dev)
Definition: superio.c:13
static struct device_operations ops
Definition: superio.c:101
static struct pnp_info pnp_dev_info[]
Definition: superio.c:110
static void w83627hf_pnp_enable_resources(struct device *dev)
Definition: superio.c:87
static void init_acpi(struct device *dev)
Definition: superio.c:23