coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
ramstage.c File Reference
#include <baseboard/variants.h>
#include <device/pci_ids.h>
Include dependency graph for ramstage.c:

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Functions

void variant_devtree_update (void)
 

Variables

const struct cpu_power_limits limits []
 

Function Documentation

◆ variant_devtree_update()

void variant_devtree_update ( void  )

Definition at line 16 of file ramstage.c.

References ARRAY_SIZE, limits, and variant_update_power_limits().

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Variable Documentation

◆ limits

const struct cpu_power_limits limits[]
Initial value:
= {
{ PCI_DID_INTEL_ADL_P_ID_7, 15, 3000, 15000, 39000, 39000, 100000 },
{ PCI_DID_INTEL_ADL_P_ID_6, 15, 3000, 15000, 39000, 39000, 100000 },
{ PCI_DID_INTEL_ADL_P_ID_5, 28, 4000, 28000, 43000, 43000, 105000 },
{ PCI_DID_INTEL_ADL_P_ID_3, 28, 4000, 28000, 43000, 43000, 105000 },
{ PCI_DID_INTEL_ADL_P_ID_3, 45, 5000, 45000, 80000, 80000, 159000 },
}
#define PCI_DID_INTEL_ADL_P_ID_7
Definition: pci_ids.h:4069
#define PCI_DID_INTEL_ADL_P_ID_3
Definition: pci_ids.h:4065
#define PCI_DID_INTEL_ADL_P_ID_5
Definition: pci_ids.h:4067
#define PCI_DID_INTEL_ADL_P_ID_6
Definition: pci_ids.h:4068

Definition at line 1 of file ramstage.c.