coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
BiosCallOuts.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <console/console.h>
4 #include <AGESA.h>
5 #include <spd_bin.h>
7 #include <SB800.h>
8 
9 #include "gpio_ftns.h"
10 
11 static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigPtr);
12 static AGESA_STATUS board_ReadSpd_from_cbfs(UINT32 Func, UINTN Data, VOID *ConfigPtr);
13 
15 {
16  {AGESA_DO_RESET, agesa_Reset },
17  {AGESA_READ_SPD, board_ReadSpd_from_cbfs },
18  {AGESA_READ_SPD_RECOVERY, agesa_NoopUnsupported },
19  {AGESA_RUNFUNC_ONAP, agesa_RunFuncOnAp },
20  {AGESA_GNB_PCIE_SLOT_RESET, agesa_NoopSuccess },
21  {AGESA_HOOKBEFORE_DRAM_INIT, board_BeforeDramInit },
22  {AGESA_HOOKBEFORE_DRAM_INIT_RECOVERY, agesa_NoopSuccess },
23  {AGESA_HOOKBEFORE_DQS_TRAINING, agesa_NoopSuccess },
24  {AGESA_HOOKBEFORE_EXIT_SELF_REF, agesa_NoopSuccess },
25 };
27 
28 /* Call the host environment interface to provide a user hook opportunity. */
29 static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigPtr)
30 {
31  // Unlike e.g. AMD Inagua, Persimmon is unable to vary the RAM voltage.
32  // Make sure the right speed settings are selected.
33  ((MEM_DATA_STRUCT*)ConfigPtr)->ParameterListPtr->DDR3Voltage = VOLT1_5;
34  return AGESA_SUCCESS;
35 }
36 
37 static AGESA_STATUS board_ReadSpd_from_cbfs(UINT32 Func, UINTN Data, VOID *ConfigPtr)
38 {
39  AGESA_READ_SPD_PARAMS *info = ConfigPtr;
40 
41  if (!ENV_ROMSTAGE)
42  return AGESA_UNSUPPORTED;
43 
44  u8 index = get_spd_offset();
45 
46  if (info->MemChannelId > 0)
47  return AGESA_UNSUPPORTED;
48  if (info->SocketId != 0)
49  return AGESA_UNSUPPORTED;
50  if (info->DimmId != 0)
51  return AGESA_UNSUPPORTED;
52 
53  /* Read index 0, first SPD_SIZE bytes of spd.bin file. */
54  if (read_ddr3_spd_from_cbfs((u8*)info->Buffer, index) < 0)
55  die("No SPD data\n");
56 
57  return AGESA_SUCCESS;
58 }
#define AGESA_SUCCESS
Definition: Amd.h:38
unsigned int AGESA_STATUS
Definition: Amd.h:36
#define AGESA_UNSUPPORTED
Definition: Amd.h:41
int get_spd_offset(void)
Definition: gpio_ftns.c:25
#define ARRAY_SIZE(a)
Definition: helpers.h:12
void __noreturn die(const char *fmt,...)
Definition: die.c:17
AGESA_STATUS agesa_RunFuncOnAp(UINT32 Func, UINTN Data, VOID *ConfigPtr)
Definition: def_callouts.c:102
AGESA_STATUS agesa_NoopUnsupported(UINT32 Func, UINTN Data, VOID *ConfigPtr)
Definition: def_callouts.c:48
AGESA_STATUS agesa_NoopSuccess(UINT32 Func, UINTN Data, VOID *ConfigPtr)
Definition: def_callouts.c:53
AGESA_STATUS agesa_Reset(UINT32 Func, UINTN Data, VOID *ConfigPtr)
Definition: def_callouts.c:66
static struct smmstore_params_info info
Definition: ramstage.c:12
const int BiosCalloutsLen
Definition: BiosCallOuts.c:25
const BIOS_CALLOUT_STRUCT BiosCallouts[]
Definition: BiosCallOuts.c:13
static AGESA_STATUS board_ReadSpd_from_cbfs(UINT32 Func, UINTN Data, VOID *ConfigPtr)
Definition: BiosCallOuts.c:37
static AGESA_STATUS board_BeforeDramInit(UINT32 Func, UINTN Data, VOID *ConfigPtr)
Definition: BiosCallOuts.c:29
#define ENV_ROMSTAGE
Definition: rules.h:149
int read_ddr3_spd_from_cbfs(u8 *buf, int idx)
uint8_t u8
Definition: stdint.h:45