coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
chromeos.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <bootmode.h>
4 #include <boot/coreboot_tables.h>
5 #include <gpio.h>
6 #include <soc/gpio.h>
7 #include <variant/gpio.h>
8 #include <types.h>
9 #include <vendorcode/google/chromeos/chromeos.h>
10 #include <security/tpm/tss.h>
11 #include <device/device.h>
12 #include <intelblocks/pmclib.h>
13 
18 };
19 
20 void fill_lb_gpios(struct lb_gpios *gpios)
21 {
22  struct lb_gpio chromeos_gpios[] = {
23  {-1, ACTIVE_HIGH, get_lid_switch(), "lid"},
24  {-1, ACTIVE_HIGH, 0, "power"},
25  {-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},
26  {-1, ACTIVE_HIGH, 0, "EC in RW"},
27  };
28  lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios));
29 }
30 
32 {
33  return gpio_get(GPP_E15);
34 }
35 
37 {
38  return !gpio_get(GPP_E8);
39 }
40 
41 
43 {
44  static enum rec_mode_state saved_rec_mode = REC_MODE_UNINITIALIZED;
46  uint8_t cr50_state = 0;
47 
48  /* Check cached state, since TPM will only tell us the first time */
49  if (saved_rec_mode != REC_MODE_UNINITIALIZED)
50  return saved_rec_mode == REC_MODE_REQUESTED;
51 
52  /*
53  * Read one-time recovery request from cr50 in verstage only since
54  * the TPM driver won't be set up in time for other stages like romstage
55  * and the value from the TPM would be wrong anyway since the verstage
56  * read would have cleared the value on the TPM.
57  *
58  * The TPM recovery request is passed between stages through vboot data
59  * or cbmem depending on stage.
60  */
63  cr50_state)
65 
66  /* Read state from the GPIO controlled by servo. */
69 
70  /* Store the state in case this is called again in verstage. */
71  saved_rec_mode = state;
72 
73  return state == REC_MODE_REQUESTED;
74 }
75 
76 int get_lid_switch(void)
77 {
78  return 1;
79 }
80 
82 {
83  /* Ensure system powers up after CR50 reset */
84  if (ENV_RAMSTAGE)
86 }
87 
89 {
90  /* Do not have a Chrome EC involved in entering recovery mode;
91  Always return trusted. */
92  return 1;
93 }
#define GPP_E8
#define GPP_E15
void fill_lb_gpios(struct lb_gpios *gpios)
Definition: chromeos.c:9
int get_write_protect_state(void)
Only used if CONFIG(CHROMEOS) is set.
Definition: chromeos.c:15
int gfx_get_init_done(void)
Definition: bootmode.c:10
#define ARRAY_SIZE(a)
Definition: helpers.h:12
int get_ec_is_trusted(void)
Definition: chromeos.c:25
int get_recovery_mode_switch(void)
HACK: Use Fn-Key as recovery mode switch.
Definition: chromeos.c:29
int get_lid_switch(void)
Definition: chromeos.c:37
#define ACTIVE_HIGH
Definition: chromeos.c:18
void mainboard_prepare_cr50_reset(void)
Definition: chromeos.c:84
rec_mode_state
Definition: chromeos.c:17
@ REC_MODE_REQUESTED
Definition: chromeos.c:20
@ REC_MODE_UNINITIALIZED
Definition: chromeos.c:18
@ REC_MODE_NOT_REQUESTED
Definition: chromeos.c:19
static bool raw_get_recovery_mode_switch(void)
Definition: chromeos.c:36
void lb_add_gpios(struct lb_gpios *gpios, const struct lb_gpio *gpio_table, size_t count)
int gpio_get(gpio_t gpio)
Definition: gpio.c:166
state
Definition: raminit.c:1787
#define ENV_RAMSTAGE
Definition: rules.h:150
#define ENV_SEPARATE_VERSTAGE
Definition: rules.h:152
uint32_t tlcl_cr50_get_recovery_button(uint8_t *recovery_button_state)
CR50 specific tpm command to get the latched state of the recovery button.
Definition: cr50.c:51
void pmc_soc_set_afterg3_en(const bool on)
Definition: pmutil.c:263
unsigned char uint8_t
Definition: stdint.h:8
#define TPM_SUCCESS
Definition: tss_common.h:9