coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
chromeos.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <bootmode.h>
4 #include <boot/coreboot_tables.h>
5 #include <device/mmio.h>
6 #include <gpio.h>
7 #include <soc/gpio.h>
8 #include <types.h>
9 #include <vendorcode/google/chromeos/chromeos.h>
10 
11 /* The WP status pin lives on MF_ISH_GPIO_4 */
12 #define WP_STATUS_PAD_CFG0 0x4838
13 #define WP_STATUS_PAD_CFG1 0x483C
14 
15 #define WP_GPIO GP_E_22
16 
17 #define ACTIVE_LOW 0
18 #define ACTIVE_HIGH 1
19 
20 void fill_lb_gpios(struct lb_gpios *gpios)
21 {
22  struct lb_gpio chromeos_gpios[] = {
23  {-1, ACTIVE_HIGH, get_lid_switch(), "lid"},
24  {-1, ACTIVE_HIGH, 0, "power"},
25  {-1, ACTIVE_HIGH, gfx_get_init_done(), "oprom"},
26  };
27  lb_add_gpios(gpios, chromeos_gpios, ARRAY_SIZE(chromeos_gpios));
28 }
29 
31 {
32  /*
33  * The vboot loader queries this function in romstage. The GPIOs have
34  * not been set up yet as that configuration is done in ramstage.
35  * Configuring this GPIO as input so that there isn't any ambiguity
36  * in the reading.
37  */
38 #if ENV_ROMSTAGE
39  if (CONFIG(BOARD_GOOGLE_CYAN)) {
44  } else {
46  }
47 #endif
48 
49  /* WP is enabled when the pin is reading high. */
50  if (CONFIG(BOARD_GOOGLE_CYAN)) {
52  & PAD_VAL_HIGH);
53  } else {
54  return !!gpio_get(WP_GPIO);
55  }
56 }
57 
58 static const struct cros_gpio cros_gpios[] = {
59  CROS_GPIO_REC_AL(CROS_GPIO_VIRTUAL, CROS_GPIO_DEVICE_NAME),
60  CROS_GPIO_WP_AH(0x10013, CROS_GPIO_DEVICE_NAME),
61 };
63 
65 {
66  /* Do not have a Chrome EC involved in entering recovery mode;
67  Always return trusted. */
68  return 1;
69 }
void fill_lb_gpios(struct lb_gpios *gpios)
Definition: chromeos.c:9
int get_write_protect_state(void)
Only used if CONFIG(CHROMEOS) is set.
Definition: chromeos.c:15
static void write32(void *addr, uint32_t val)
Definition: mmio.h:40
static uint32_t read32(const void *addr)
Definition: mmio.h:22
int gfx_get_init_done(void)
Definition: bootmode.c:10
#define ARRAY_SIZE(a)
Definition: helpers.h:12
@ CONFIG
Definition: dsi_common.h:201
DECLARE_CROS_GPIOS(cros_gpios)
int get_ec_is_trusted(void)
Definition: chromeos.c:25
int get_lid_switch(void)
Definition: chromeos.c:37
#define ACTIVE_HIGH
Definition: chromeos.c:18
#define WP_GPIO
Definition: chromeos.c:15
#define WP_STATUS_PAD_CFG1
Definition: chromeos.c:13
#define WP_STATUS_PAD_CFG0
Definition: chromeos.c:12
static const struct cros_gpio cros_gpios[]
Definition: chromeos.c:58
void lb_add_gpios(struct lb_gpios *gpios, const struct lb_gpio *gpio_table, size_t count)
int gpio_get(gpio_t gpio)
Definition: gpio.c:166
void gpio_input_pullup(gpio_t gpio)
Definition: gpio.c:184
#define CROS_GPIO_DEVICE_NAME
Definition: gpio.h:14
#define PAD_VAL_HIGH
Definition: gpio.h:136
#define PAD_CONFIG1_DEFAULT0
Definition: gpio.h:204
#define PAD_PULL_UP_20K
Definition: gpio.h:160
#define PAD_CONFIG0_GPI_DEFAULT
Definition: gpio.h:201
#define PAD_GPIO_ENABLE
Definition: gpio.h:172
#define COMMUNITY_GPEAST_BASE
Definition: gpio.h:20