coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
|
#include <arch/exception.h>
#include <armv7.h>
#include <boot_device.h>
#include <cbmem.h>
#include <commonlib/region.h>
#include <console/console.h>
#include <device/i2c_simple.h>
#include <drivers/maxim/max77802/max77802.h>
#include <program_loading.h>
#include <soc/clk.h>
#include <soc/cpu.h>
#include <soc/dmc.h>
#include <soc/gpio.h>
#include <soc/i2c.h>
#include <soc/periph.h>
#include <soc/power.h>
#include <soc/setup.h>
#include <soc/trustzone.h>
#include <soc/wakeup.h>
#include <timestamp.h>
#include <types.h>
Go to the source code of this file.
Data Structures | |
struct | pmic_write |
Macros | |
#define | PMIC_I2C_BUS 4 |
#define | PRIMITIVE_MEM_TEST 0 |
#define | primitive_mem_test() |
#define | SIMPLE_SPI_TEST 0 |
#define | simple_spi_test() |
Functions | |
static int | setup_power (int is_resume) |
static void | setup_ec (void) |
static void | setup_gpio (void) |
static void | setup_memory (struct mem_timings *mem, int is_resume) |
void | main (void) |
Variables | |
struct pmic_write | pmic_writes [] |
#define PMIC_I2C_BUS 4 |
Definition at line 25 of file romstage.c.
#define PRIMITIVE_MEM_TEST 0 |
Definition at line 125 of file romstage.c.
#define primitive_mem_test | ( | ) |
Definition at line 152 of file romstage.c.
#define SIMPLE_SPI_TEST 0 |
Definition at line 155 of file romstage.c.
#define simple_spi_test | ( | ) |
Definition at line 201 of file romstage.c.
Definition at line 204 of file romstage.c.
References cbmem_initialize_empty(), clock_set_rate(), console_init(), die(), exception_init(), exynos5420_config_smp(), exynos_pinmux_spi1(), exynos_pinmux_uart3(), get_wakeup_state(), i2c_init(), IS_NOT_WAKEUP, PERIPH_ID_SPI1, PMIC_I2C_BUS, primitive_mem_test, run_ramstage(), setup_ec(), setup_gpio(), setup_memory(), setup_power(), simple_spi_test, system_clock_init(), timestamp_add_now(), timestamp_get, timestamp_init(), trustzone_init(), TS_INITRAM_END, TS_INITRAM_START, TS_ROMSTAGE_START, and wakeup().
Definition at line 89 of file romstage.c.
References clock_set_rate(), exynos_pinmux_spi2(), and PERIPH_ID_SPI2.
Referenced by main().
Definition at line 97 of file romstage.c.
References gpio_direction_input(), GPIO_PULL_NONE, gpio_set_pull(), GPIO_X07, GPIO_X12, GPIO_X30, and GPIO_X34.
Referenced by main().
|
static |
Definition at line 112 of file romstage.c.
References BIOS_SPEW, ddr3_mem_ctrl_init(), die(), DMC_INTERLEAVE_SIZE, mem_timings::frequency_mhz, mem_timings::mem_manuf, mem_timings::mem_type, mem_timings::mpll_mdiv, and printk.
Referenced by main().
|
static |
Definition at line 60 of file romstage.c.
References ARRAY_SIZE, exynos_pinmux_i2c4(), i2c_init(), i2c_readb(), i2c_writeb(), MAX77802_I2C_ADDR, pmic_write::or_orig, PMIC_I2C_BUS, pmic_writes, power_init(), pmic_write::reg, and pmic_write::val.
Referenced by main().
struct pmic_write pmic_writes[] |
Definition at line 1 of file romstage.c.
Referenced by setup_power().