coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
gpio.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <gpio.h>
4 #include <soc/addressmap.h>
5 #include <soc/gpio.h>
6 #include <soc/grf.h>
7 #include <soc/pmu.h>
8 #include <soc/soc.h>
9 
20 };
21 
22 #define PMU_GPIO_PORT 0
23 
25 {
26  if (gpio.port == PMU_GPIO_PORT)
27  return 1;
28  return 0;
29 }
30 
32 {
33  if (is_pmu_gpio(gpio))
34  return &rk3288_pmu->gpio0pull[gpio.bank];
35  /* There is one pmu gpio, gpio0, so " - 1" */
36  return &rk3288_grf->gpio1_p[(gpio.port - 1)][gpio.bank];
37 }
38 
40 {
41  /* use the default gpio pull bias setting defined in soc/gpio.h */
42  return pull;
43 }
#define pull
Definition: asmlib.h:26
static struct rk3288_pmu_regs *const rk3288_pmu
Definition: pmu.h:55
gpio_pull
Definition: gpio_common.h:61
static struct rk3288_grf_regs *const rk3288_grf
Definition: grf.h:181
int is_pmu_gpio(gpio_t gpio)
Definition: gpio.c:24
u32 gpio_get_pull_val(gpio_t gpio, enum gpio_pull pull)
Definition: gpio.c:39
void * gpio_grf_reg(gpio_t gpio)
Definition: gpio.c:31
#define PMU_GPIO_PORT
Definition: gpio.c:22
struct rockchip_gpio_regs * gpio_port[]
Definition: gpio.c:10
#define GPIO5_BASE
Definition: addressmap.h:58
#define GPIO7_BASE
Definition: addressmap.h:60
#define GPIO8_BASE
Definition: addressmap.h:61
#define GPIO1_BASE
Definition: addressmap.h:54
#define GPIO0_BASE
Definition: addressmap.h:51
#define GPIO3_BASE
Definition: addressmap.h:56
#define GPIO2_BASE
Definition: addressmap.h:55
#define GPIO4_BASE
Definition: addressmap.h:57
#define GPIO6_BASE
Definition: addressmap.h:59
uint32_t u32
Definition: stdint.h:51
Definition: pinmux.c:36
u32 gpio1_p[8][4]
Definition: grf.h:101
u32 gpio0pull[3]
Definition: pmu.h:33