coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
BiosCallOuts.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <AGESA.h>
4 #include <amdlib.h>
5 #include <amdblocks/acpimmio.h>
6 #include <northbridge/amd/agesa/BiosCallOuts.h>
7 #include <SB800.h>
8 #include <southbridge/amd/cimx/sb800/gpio_oem.h>
9 
10 static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigPtr);
11 static AGESA_STATUS board_GnbPcieSlotReset (UINT32 Func, UINTN Data, VOID *ConfigPtr);
12 
13 const BIOS_CALLOUT_STRUCT BiosCallouts[] =
14 {
15  {AGESA_DO_RESET, agesa_Reset },
16  {AGESA_READ_SPD, agesa_ReadSpd },
17  {AGESA_READ_SPD_RECOVERY, agesa_NoopUnsupported },
18  {AGESA_RUNFUNC_ONAP, agesa_RunFuncOnAp },
19  {AGESA_GNB_PCIE_SLOT_RESET, board_GnbPcieSlotReset },
20  {AGESA_HOOKBEFORE_DRAM_INIT, board_BeforeDramInit },
21  {AGESA_HOOKBEFORE_DRAM_INIT_RECOVERY, agesa_NoopSuccess },
22  {AGESA_HOOKBEFORE_DQS_TRAINING, agesa_NoopSuccess },
23  {AGESA_HOOKBEFORE_EXIT_SELF_REF, agesa_NoopSuccess },
24 };
25 const int BiosCalloutsLen = ARRAY_SIZE(BiosCallouts);
26 
27 /* Call the host environment interface to provide a user hook opportunity. */
28 static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigPtr)
29 {
30  AGESA_STATUS Status;
31  MEM_DATA_STRUCT *MemData;
32  UINT32 GpioMmioAddr;
33  UINT8 Data8;
34  UINT8 TempData8;
35 
36  MemData = ConfigPtr;
37 
38  Status = AGESA_SUCCESS;
39  GpioMmioAddr = (uintptr_t)acpimmio_gpio_100;
40 
41  Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG178);
42  Data8 &= ~BIT5;
43  TempData8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG178);
44  TempData8 &= 0x03;
45  TempData8 |= Data8;
46  Write64Mem8(GpioMmioAddr+SB_GPIO_REG178, TempData8);
47 
48  Data8 |= BIT2+BIT3;
49  Data8 &= ~BIT4;
50  TempData8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG178);
51  TempData8 &= 0x23;
52  TempData8 |= Data8;
53  Write64Mem8(GpioMmioAddr+SB_GPIO_REG178, TempData8);
54 
55  Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG179);
56  Data8 &= ~BIT5;
57  TempData8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG179);
58  TempData8 &= 0x03;
59  TempData8 |= Data8;
60  Write64Mem8(GpioMmioAddr+SB_GPIO_REG179, TempData8);
61 
62  Data8 |= BIT2+BIT3;
63  Data8 &= ~BIT4;
64  TempData8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG179);
65  TempData8 &= 0x23;
66  TempData8 |= Data8;
67  Write64Mem8(GpioMmioAddr+SB_GPIO_REG179, TempData8);
68 
69  switch (MemData->ParameterListPtr->DDR3Voltage) {
70  case VOLT1_35:
71  Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG178);
72  Data8 &= ~(UINT8)BIT6;
73  Write64Mem8(GpioMmioAddr+SB_GPIO_REG178, Data8);
74  Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG179);
75  Data8 |= (UINT8)BIT6;
76  Write64Mem8(GpioMmioAddr+SB_GPIO_REG179, Data8);
77  break;
78  case VOLT1_25:
79  Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG178);
80  Data8 &= ~(UINT8)BIT6;
81  Write64Mem8(GpioMmioAddr+SB_GPIO_REG178, Data8);
82  Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG179);
83  Data8 &= ~(UINT8)BIT6;
84  Write64Mem8(GpioMmioAddr+SB_GPIO_REG179, Data8);
85  break;
86  case VOLT1_5:
87  default:
88  Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG178);
89  Data8 |= (UINT8)BIT6;
90  Write64Mem8(GpioMmioAddr+SB_GPIO_REG178, Data8);
91  Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG179);
92  Data8 &= ~(UINT8)BIT6;
93  Write64Mem8(GpioMmioAddr+SB_GPIO_REG179, Data8);
94  }
95  return Status;
96 }
97 
98 /* PCIE slot reset control */
99 static AGESA_STATUS board_GnbPcieSlotReset (UINT32 Func, UINTN Data, VOID *ConfigPtr)
100 {
101  AGESA_STATUS Status;
102  PCIe_SLOT_RESET_INFO *ResetInfo;
103  UINT32 GpioMmioAddr;
104  UINT8 Data8;
105 
106  GpioMmioAddr = (uintptr_t)acpimmio_gpio_100;
107 
108  ResetInfo = ConfigPtr;
109  Status = AGESA_UNSUPPORTED;
110  switch (ResetInfo->ResetId) {
111  case 4:
112  switch (ResetInfo->ResetControl) {
113  case AssertSlotReset:
114  Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG21);
115  Data8 &= ~(UINT8)BIT6;
116  /* MXM_GPIO0. GPIO21 */
117  Write64Mem8(GpioMmioAddr+SB_GPIO_REG21, Data8);
118  Status = AGESA_SUCCESS;
119  break;
120  case DeassertSlotReset:
121  Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG21);
122  Data8 |= BIT6;
123  /* MXM_GPIO0. GPIO21 */
124  Write64Mem8(GpioMmioAddr+SB_GPIO_REG21, Data8);
125  Status = AGESA_SUCCESS;
126  break;
127  }
128  break;
129  case 6:
130  switch (ResetInfo->ResetControl) {
131  case AssertSlotReset:
132  Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG25);
133  Data8 &= ~(UINT8)BIT6;
134  /* PCIE_RST#_LAN, GPIO25 */
135  Write64Mem8(GpioMmioAddr+SB_GPIO_REG25, Data8);
136  Status = AGESA_SUCCESS;
137  break;
138  case DeassertSlotReset:
139  Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG25);
140  Data8 |= BIT6;
141  /* PCIE_RST#_LAN, GPIO25 */
142  Write64Mem8(GpioMmioAddr+SB_GPIO_REG25, Data8);
143  Status = AGESA_SUCCESS;
144  break;
145  }
146  break;
147  case 7:
148  switch (ResetInfo->ResetControl) {
149  case AssertSlotReset:
150  Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG02);
151  Data8 &= ~(UINT8)BIT6;
152  /* MPCIE_RST0, GPIO02 */
153  Write64Mem8(GpioMmioAddr+SB_GPIO_REG02, Data8);
154  Status = AGESA_SUCCESS;
155  break;
156  case DeassertSlotReset:
157  Data8 = Read64Mem8(GpioMmioAddr+SB_GPIO_REG02);
158  Data8 |= BIT6;
159  /* MPCIE_RST0, GPIO02 */
160  Write64Mem8(GpioMmioAddr+SB_GPIO_REG02, Data8);
161  Status = AGESA_SUCCESS;
162  break;
163  }
164  break;
165  }
166  return Status;
167 }
AGESA_SUCCESS
#define AGESA_SUCCESS
Definition: Amd.h:38
AGESA_STATUS
unsigned int AGESA_STATUS
Definition: Amd.h:36
AGESA_UNSUPPORTED
#define AGESA_UNSUPPORTED
Definition: Amd.h:41
BIT3
#define BIT3
Definition: Ioh.h:10
BIT2
#define BIT2
Definition: Ioh.h:9
BIT4
#define BIT4
Definition: Ioh.h:11
BIT6
#define BIT6
Definition: Ioh.h:13
BIT5
#define BIT5
Definition: Ioh.h:12
acpimmio_gpio_100
uint8_t *MAYBE_CONST acpimmio_gpio_100
ARRAY_SIZE
#define ARRAY_SIZE(a)
Definition: helpers.h:12
agesa_RunFuncOnAp
AGESA_STATUS agesa_RunFuncOnAp(UINT32 Func, UINTN Data, VOID *ConfigPtr)
Definition: def_callouts.c:102
agesa_NoopUnsupported
AGESA_STATUS agesa_NoopUnsupported(UINT32 Func, UINTN Data, VOID *ConfigPtr)
Definition: def_callouts.c:48
agesa_NoopSuccess
AGESA_STATUS agesa_NoopSuccess(UINT32 Func, UINTN Data, VOID *ConfigPtr)
Definition: def_callouts.c:53
agesa_Reset
AGESA_STATUS agesa_Reset(UINT32 Func, UINTN Data, VOID *ConfigPtr)
Definition: def_callouts.c:66
gpio_oem.h
SB_GPIO_REG25
#define SB_GPIO_REG25
Definition: gpio_oem.h:12
SB_GPIO_REG02
#define SB_GPIO_REG02
Definition: gpio_oem.h:6
SB_GPIO_REG21
#define SB_GPIO_REG21
Definition: gpio_oem.h:11
BiosCalloutsLen
const int BiosCalloutsLen
Definition: BiosCallOuts.c:25
BiosCallouts
const BIOS_CALLOUT_STRUCT BiosCallouts[]
Definition: BiosCallOuts.c:13
board_BeforeDramInit
static AGESA_STATUS board_BeforeDramInit(UINT32 Func, UINTN Data, VOID *ConfigPtr)
Definition: BiosCallOuts.c:28
board_GnbPcieSlotReset
static AGESA_STATUS board_GnbPcieSlotReset(UINT32 Func, UINTN Data, VOID *ConfigPtr)
Definition: BiosCallOuts.c:99
agesa_ReadSpd
AGESA_STATUS agesa_ReadSpd(uint32_t Func, uintptr_t Data, void *ConfigPtr)
Definition: BiosCallOuts.c:81
uintptr_t
unsigned long uintptr_t
Definition: stdint.h:21
BIOS_CALLOUT_STRUCT
Definition: BiosCallOuts.h:22