coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
qup.h
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1 /* SPDX-License-Identifier: BSD-3-Clause */
2 
3 #ifndef __QUP_H__
4 #define __QUP_H__
5 
6 #include <soc/gsbi.h>
7 
8 /* QUP block registers */
9 #define QUP_CONFIG 0x0
10 #define QUP_STATE 0x4
11 #define QUP_IO_MODES 0x8
12 #define QUP_SW_RESET 0xc
13 #define QUP_TIME_OUT 0x10
14 #define QUP_TIME_OUT_CURRENT 0x14
15 #define QUP_OPERATIONAL 0x18
16 #define QUP_ERROR_FLAGS 0x1c
17 #define QUP_ERROR_FLAGS_EN 0x20
18 #define QUP_TEST_CTRL 0x24
19 #define QUP_MX_OUTPUT_COUNT 0x100
20 #define QUP_MX_OUTPUT_CNT_CURRENT 0x104
21 #define QUP_OUTPUT_DEBUG 0x108
22 #define QUP_OUTPUT_FIFO_WORD_CNT 0x10c
23 #define QUP_OUTPUT_FIFO 0x110
24 #define QUP_MX_WRITE_COUNT 0x150
25 #define QUP_WRITE_CNT_CURRENT 0x154
26 #define QUP_MX_INPUT_COUNT 0x200
27 #define QUP_READ_COUNT 0x208
28 #define QUP_MX_READ_CNT_CURRENT 0x20c
29 #define QUP_INPUT_DEBUG 0x210
30 #define QUP_INPUT_FIFO_WORD_CNT 0x214
31 #define QUP_INPUT_FIFO 0x218
32 #define QUP_I2C_MASTER_CLK_CTL 0x400
33 #define QUP_I2C_MASTER_STATUS 0x404
34 
35 #define OUTPUT_FIFO_FULL (1<<6)
36 #define INPUT_FIFO_NOT_EMPTY (1<<5)
37 #define OUTPUT_FIFO_NOT_EMPTY (1<<4)
38 #define INPUT_SERVICE_FLAG (1<<9)
39 #define OUTPUT_SERVICE_FLAG (1<<8)
40 #define QUP_OUTPUT_BIT_SHIFT_EN (1<<16)
41 
42 #define QUP_MODE_MASK (0x03)
43 #define QUP_OUTPUT_MODE_SHFT (10)
44 #define QUP_INPUT_MODE_SHFT (12)
45 
46 #define QUP_FS_DIVIDER_MASK (0xFF)
47 
48 #define QUP_MINI_CORE_PROTO_SHFT (8)
49 #define QUP_MINI_CORE_PROTO_MASK (0x0F)
50 
51 /* Mini-core states */
52 #define QUP_STATE_RESET 0x0
53 #define QUP_STATE_RUN 0x1
54 #define QUP_STATE_PAUSE 0x3
55 #define QUP_STATE_VALID (1<<2)
56 #define QUP_STATE_MASK 0x3
57 #define QUP_STATE_VALID_MASK (1<<2)
58 
59 /* Tags for output FIFO */
60 #define QUP_I2C_1CLK_NOOP_SEQ 0x1 /*MSB 8-bit NOP, LSB 8-bits 1 clk.*/
61 #define QUP_I2C_START_SEQ (0x1 << 8)
62 #define QUP_I2C_DATA_SEQ (0x2 << 8)
63 #define QUP_I2C_STOP_SEQ (0x3 << 8)
64 #define QUP_I2C_RECV_SEQ (0x4 << 8)
65 
66 /* Tags for input FIFO */
67 #define QUP_I2C_MIDATA_SEQ (0x5 << 8)
68 #define QUP_I2C_MISTOP_SEQ (0x6 << 8)
69 #define QUP_I2C_MINACK_SEQ (0x7 << 8)
70 
71 #define QUP_I2C_ADDR(x) ((x & 0xFF) << 1)
72 #define QUP_I2C_DATA(x) (x & 0xFF)
73 #define QUP_I2C_MI_TAG(x) (x & 0xFF00)
74 #define QUP_I2C_SLAVE_READ (0x1)
75 
76 /*Bit vals for I2C_MASTER_CLK_CTL register */
77 #define QUP_HS_DIVIDER_SHFT (8)
78 #define QUP_DIVIDER_MIN_VAL (0x3)
79 
80 /* Bit masks for I2C_MASTER_STATUS register */
81 #define QUP_I2C_INVALID_READ_SEQ (1 << 25)
82 #define QUP_I2C_INVALID_READ_ADDR (1 << 24)
83 #define QUP_I2C_INVALID_TAG (1 << 23)
84 #define QUP_I2C_FAILED_MASK (0x3 << 6)
85 #define QUP_I2C_INVALID_WRITE (1 << 5)
86 #define QUP_I2C_ARB_LOST (1 << 4)
87 #define QUP_I2C_PACKET_NACK (1 << 3)
88 #define QUP_I2C_BUS_ERROR (1 << 2)
89 
90 typedef enum {
105 } qup_return_t;
106 
107 typedef enum {
112 
113 typedef enum {
117 } qup_mode_t;
118 
119 typedef struct {
120  qup_protocol_t protocol;
121  unsigned int clk_frequency;
122  unsigned int src_frequency;
123  qup_mode_t mode;
124  unsigned int initialized;
125 } qup_config_t;
126 
127 typedef struct {
128  qup_protocol_t protocol;
129  union {
130  struct {
131  uint8_t addr;
132  uint8_t *data;
133  unsigned int data_len;
134  } iic;
135  struct {
136  void *in;
137  void *out;
138  unsigned int size;
139  } spi;
140  } p;
141 } qup_data_t;
142 
143 /*
144  * Initialize GSBI QUP block for FIFO I2C transfers.
145  * gsbi_id[IN]: GSBI for which QUP is to be initialized.
146  * config_ptr[IN]: configurations parameters for the QUP.
147  *
148  * return: QUP_SUCCESS, if initialization succeeds.
149  */
150 qup_return_t qup_init(gsbi_id_t gsbi_id, const qup_config_t *config_ptr);
151 
152 /*
153  * Set QUP state to run, pause, reset.
154  * gsbi_id[IN]: GSBI block for which QUP state is to be set.
155  * state[IN]: New state to transition to.
156  *
157  * return: QUP_SUCCESS, if state transition succeeds.
158  */
160 
161 /*
162  * Reset the status bits set during an i2c transfer.
163  * gsbi_id[IN]: GSBI block for which i2c status bits are to be cleared.
164  *
165  * return: QUP_SUCCESS, if status bits are cleared successfully.
166  */
168 
169 /*
170  * Send data to the peripheral on the bus.
171  * gsbi_id[IN]: GSBI block for which data is to be sent.
172  * p_tx_obj[IN]: Data to be sent to the slave on the bus.
173  * stop_seq[IN]: When set to non-zero QUP engine sends i2c stop sequnce.
174  *
175  * return: QUP_SUCCESS, when data is sent successfully to the peripheral.
176  */
178  uint8_t stop_seq);
179 
180 /*
181  * Receive data from peripheral on the bus.
182  * gsbi_id[IN]: GSBI block from which data is to be received.
183  * p_tx_obj[IN]: length of data to be received, slave address.
184  * [OUT]: buffer filled with data from slave.
185  *
186  * return: QUP_SUCCESS, when data is received successfully.
187  */
188 qup_return_t qup_recv_data(gsbi_id_t gsbi_id, qup_data_t *p_tx_obj);
189 
190 #endif //__QUP_H__
static int initialized
Definition: bootmem.c:11
static u32 addr
Definition: cirrus.c:14
gsbi_id_t
Definition: gsbi.h:18
qup_return_t qup_set_state(blsp_qup_id_t id, uint32_t state)
Definition: qup.c:450
qup_return_t qup_recv_data(blsp_qup_id_t id, qup_data_t *p_tx_obj)
Definition: qup.c:533
qup_protocol_t
Definition: qup.h:119
@ QUP_MINICORE_I2C_SLAVE
Definition: qup.h:122
@ QUP_MINICORE_SPI
Definition: qup.h:120
@ QUP_MINICORE_I2C_MASTER
Definition: qup.h:121
qup_return_t qup_send_data(blsp_qup_id_t id, qup_data_t *p_tx_obj, uint8_t stop_seq)
Definition: qup.c:494
qup_return_t
Definition: qup.h:102
@ QUP_ERR_I2C_INVALID_SLAVE_ADDR
Definition: qup.h:111
@ QUP_ERR_STATE_SET
Definition: qup.h:105
@ QUP_ERR_TIMEOUT
Definition: qup.h:106
@ QUP_ERR_UNSUPPORTED
Definition: qup.h:107
@ QUP_ERR_I2C_ARB_LOST
Definition: qup.h:109
@ QUP_ERR_UNDEFINED
Definition: qup.h:116
@ QUP_ERR_I2C_BUS_ERROR
Definition: qup.h:110
@ QUP_ERR_BAD_PARAM
Definition: qup.h:104
@ QUP_ERR_I2C_INVALID_WRITE
Definition: qup.h:114
@ QUP_ERR_I2C_NACK
Definition: qup.h:113
@ QUP_ERR_I2C_INVALID_TAG
Definition: qup.h:115
@ QUP_SUCCESS
Definition: qup.h:103
@ QUP_ERR_XFER_FAIL
Definition: qup.h:112
@ QUP_ERR_I2C_FAILED
Definition: qup.h:108
qup_return_t qup_reset_i2c_master_status(blsp_qup_id_t id)
Definition: qup.c:79
qup_mode_t
Definition: qup.h:125
@ QUP_MODE_BLOCK
Definition: qup.h:127
@ QUP_MODE_FIFO
Definition: qup.h:126
@ QUP_MODE_DATAMOVER
Definition: qup.h:128
qup_return_t qup_init(blsp_qup_id_t id, const qup_config_t *config_ptr)
Definition: qup.c:380
state
Definition: raminit.c:1787
unsigned int uint32_t
Definition: stdint.h:14
unsigned char uint8_t
Definition: stdint.h:8
Definition: jpeg.c:27