12 static int width = CONFIG_DRIVERS_EMULATION_QEMU_BOCHS_XRES;
13 static int height = CONFIG_DRIVERS_EMULATION_QEMU_BOCHS_YRES;
45 #define VGA_IO_MISC_COLOR 0x01
47 #define VGA_CR_WIDTH_DIVISOR 8
49 #define VGA_CR_OVERFLOW_VERT_DISPLAY_ENABLE_END1_SHIFT 7
50 #define VGA_CR_OVERFLOW_VERT_DISPLAY_ENABLE_END1_MASK 0x02
51 #define VGA_CR_OVERFLOW_VERT_DISPLAY_ENABLE_END2_SHIFT 3
52 #define VGA_CR_OVERFLOW_VERT_DISPLAY_ENABLE_END2_MASK 0x40
54 #define VGA_CR_OVERFLOW_VERT_TOTAL1_SHIFT 8
55 #define VGA_CR_OVERFLOW_VERT_TOTAL1_MASK 0x01
56 #define VGA_CR_OVERFLOW_VERT_TOTAL2_SHIFT 4
57 #define VGA_CR_OVERFLOW_VERT_TOTAL2_MASK 0x20
59 #define VGA_CR_OVERFLOW_VSYNC_START1_SHIFT 6
60 #define VGA_CR_OVERFLOW_VSYNC_START1_MASK 0x04
61 #define VGA_CR_OVERFLOW_VSYNC_START2_SHIFT 2
62 #define VGA_CR_OVERFLOW_VSYNC_START2_MASK 0x80
64 #define VGA_CR_OVERFLOW_HEIGHT1_SHIFT 7
65 #define VGA_CR_OVERFLOW_HEIGHT1_MASK 0x02
66 #define VGA_CR_OVERFLOW_HEIGHT2_SHIFT 3
67 #define VGA_CR_OVERFLOW_HEIGHT2_MASK 0xc0
68 #define VGA_CR_OVERFLOW_LINE_COMPARE_SHIFT 4
69 #define VGA_CR_OVERFLOW_LINE_COMPARE_MASK 0x10
71 #define VGA_CR_CELL_HEIGHT_LINE_COMPARE_MASK 0x40
72 #define VGA_CR_CELL_HEIGHT_LINE_COMPARE_SHIFT 3
73 #define VGA_CR_CELL_HEIGHT_VERTICAL_BLANK_MASK 0x20
74 #define VGA_CR_CELL_HEIGHT_VERTICAL_BLANK_SHIFT 4
75 #define VGA_CR_CELL_HEIGHT_DOUBLE_SCAN 0x80
81 #define VGA_CR_PITCH_DIVISOR 8
155 #define CIRRUS_CR_EXTENDED_DISPLAY 0x1b
156 #define CIRRUS_CR_EXTENDED_OVERLAY 0x1d
158 #define CIRRUS_CR_EXTENDED_DISPLAY_PITCH_MASK 0x10
159 #define CIRRUS_CR_EXTENDED_DISPLAY_PITCH_SHIFT 4
160 #define CIRRUS_CR_EXTENDED_DISPLAY_START_MASK1 0x1
161 #define CIRRUS_CR_EXTENDED_DISPLAY_START_SHIFT1 16
162 #define CIRRUS_CR_EXTENDED_DISPLAY_START_MASK2 0xc
163 #define CIRRUS_CR_EXTENDED_DISPLAY_START_SHIFT2 15
165 #define CIRRUS_CR_EXTENDED_OVERLAY_DISPLAY_START_MASK 0x80
166 #define CIRRUS_CR_EXTENDED_OVERLAY_DISPLAY_START_SHIFT 12
167 #define CIRRUS_SR_EXTENDED_MODE 7
168 #define CIRRUS_SR_EXTENDED_MODE_LFB_ENABLE 0xf0
169 #define CIRRUS_SR_EXTENDED_MODE_ENABLE_EXT 0x01
170 #define CIRRUS_SR_EXTENDED_MODE_32BPP 0x08
171 #define CIRRUS_HIDDEN_DAC_888COLOR 0xc5
188 uint8_t sr_ext = 0, hidden_dac = 0;
189 unsigned int vdisplay_end =
height - 2;
190 unsigned int line_compare = 0x3ff;
191 uint8_t overflow, cell_height_reg;
193 unsigned int horizontal_total = horizontal_end + 40;
194 unsigned int horizontal_blank_start = horizontal_end;
195 unsigned int horizontal_sync_pulse_start = horizontal_end + 3;
196 unsigned int horizontal_sync_pulse_end = 0;
198 unsigned int horizontal_blank_end = 0;
199 unsigned int vertical_blank_start =
height + 1;
200 unsigned int vertical_blank_end = 0;
201 unsigned int vertical_sync_start =
height + 3;
202 unsigned int vertical_sync_end = 0;
203 unsigned int vertical_total =
height + 40;
245 cell_height_reg = ((vertical_blank_start
256 horizontal_sync_pulse_start);
258 horizontal_sync_pulse_end);
313 if (
CONFIG(LINEAR_FRAMEBUFFER))
315 else if (
CONFIG(VGA_TEXT_FRAMEBUFFER))
326 static const struct pci_driver qemu_cirrus_driver
__pci_driver = {
#define VGA_CR_OVERFLOW_LINE_COMPARE_SHIFT
#define CIRRUS_SR_EXTENDED_MODE
#define CIRRUS_SR_EXTENDED_MODE_LFB_ENABLE
#define VGA_CR_OVERFLOW_VERT_DISPLAY_ENABLE_END1_MASK
#define VGA_CR_OVERFLOW_VERT_TOTAL1_MASK
@ VGA_SR_MAP_MASK_REGISTER
#define CIRRUS_CR_EXTENDED_DISPLAY_START_MASK1
#define VGA_CR_OVERFLOW_LINE_COMPARE_MASK
@ VGA_GR_MODE_ODD_EVEN_SHIFT
#define VGA_CR_OVERFLOW_VSYNC_START2_MASK
#define CIRRUS_SR_EXTENDED_MODE_ENABLE_EXT
#define VGA_CR_CELL_HEIGHT_LINE_COMPARE_SHIFT
#define VGA_CR_OVERFLOW_VERT_TOTAL2_SHIFT
#define CIRRUS_CR_EXTENDED_OVERLAY
#define VGA_CR_CELL_HEIGHT_VERTICAL_BLANK_SHIFT
#define VGA_CR_OVERFLOW_VERT_DISPLAY_ENABLE_END2_SHIFT
#define VGA_CR_OVERFLOW_VERT_DISPLAY_ENABLE_END2_MASK
#define CIRRUS_CR_EXTENDED_DISPLAY
@ VGA_GR_GR6_GRAPHICS_MODE
@ VGA_SR_CLOCKING_MODE_8_DOT_CLOCK
@ VGA_SR_MEMORY_MODE_CHAIN4
@ VGA_SR_MEMORY_MODE_EXTERNAL_VIDEO_MEMORY
@ VGA_SR_MEMORY_MODE_NORMAL
@ VGA_SR_MEMORY_MODE_SEQUENTIAL_ADDRESSING
#define CIRRUS_CR_EXTENDED_DISPLAY_PITCH_MASK
#define VGA_IO_MISC_COLOR
#define VGA_CR_PITCH_DIVISOR
@ VGA_CR_CURSOR_START_DISABLE
#define VGA_CR_OVERFLOW_VERT_TOTAL1_SHIFT
#define VGA_CR_CELL_HEIGHT_VERTICAL_BLANK_MASK
#define VGA_CR_OVERFLOW_VSYNC_START1_MASK
#define VGA_CR_OVERFLOW_VSYNC_START1_SHIFT
#define VGA_CR_WIDTH_DIVISOR
@ VGA_GR_COLOR_COMPARE_DISABLE
@ VGA_GR_READ_MAP_REGISTER
@ VGA_GR_SET_RESET_PLANE_ENABLE
static void cirrus_init(struct device *dev)
@ VGA_CR_UNDERLINE_LOCATION
@ VGA_CR_START_ADDR_LOW_REGISTER
@ VGA_CR_CURSOR_ADDR_HIGH
@ VGA_CR_HORIZ_SYNC_PULSE_END
@ VGA_CR_VERTICAL_BLANK_START
@ VGA_CR_START_ADDR_HIGH_REGISTER
@ VGA_CR_HORIZ_SYNC_PULSE_START
@ VGA_CR_VERTICAL_BLANK_END
@ VGA_CR_MODE_ADDRESS_WRAP
@ VGA_CR_MODE_TIMING_ENABLE
@ VGA_CR_MODE_NO_HERCULES
#define VGA_CR_OVERFLOW_VSYNC_START2_SHIFT
#define CIRRUS_HIDDEN_DAC_888COLOR
static void write_hidden_dac(uint8_t data)
#define VGA_CR_OVERFLOW_VERT_TOTAL2_MASK
#define CIRRUS_CR_EXTENDED_DISPLAY_PITCH_SHIFT
#define VGA_CR_OVERFLOW_VERT_DISPLAY_ENABLE_END1_SHIFT
static void cirrus_init_text_mode(struct device *dev)
#define CIRRUS_CR_EXTENDED_DISPLAY_START_MASK2
static const struct pci_driver qemu_cirrus_driver __pci_driver
#define CIRRUS_SR_EXTENDED_MODE_32BPP
#define CIRRUS_CR_EXTENDED_OVERLAY_DISPLAY_START_MASK
static struct device_operations qemu_cirrus_graph_ops
static void cirrus_init_linear_fb(struct device *dev)
#define VGA_CR_CELL_HEIGHT_LINE_COMPARE_MASK
#define printk(level,...)
void outb(u8 val, u16 port)
struct fb_info * fb_add_framebuffer_info(uintptr_t fb_addr, uint32_t x_resolution, uint32_t y_resolution, uint32_t bytes_per_line, uint8_t bits_per_pixel)
static __always_inline u32 pci_read_config32(const struct device *dev, u16 reg)
#define BIOS_DEBUG
BIOS_DEBUG - Verbose output.
#define PCI_BASE_ADDRESS_MEM_ATTR_MASK
#define PCI_BASE_ADDRESS_0
void pci_dev_enable_resources(struct device *dev)
void pci_dev_read_resources(struct device *dev)
void pci_dev_set_resources(struct device *dev)
void(* read_resources)(struct device *dev)
void vga_textmode_init(void)
void vga_misc_write(unsigned char value)
void vga_palette_disable(void)
void vga_gr_write(unsigned char index, unsigned char value)
void vga_cr_write(unsigned char index, unsigned char value)
unsigned char vga_cr_read(unsigned char index)
void vga_sr_write(unsigned char index, unsigned char value)