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sch5545.h
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 /*
4  * Based on SMSC SCH5627 datahseet:
5  * http://pdf.datasheetcatalog.com/datasheets/microchip/00001996A.pdf
6  */
7 
8 #ifndef SUPERIO_SCH_5545_H
9 #define SUPERIO_SCH_5545_H
10 
11 /* LPC I/O space */
12 #define SCH5545_RUNTIME_REG_BASE 0x0a00
13 #define SCH5545_EMI_BASE 0x0a40
14 
15 /* logical devices */
16 #define SCH5545_LDN_EMI 0x00
17 #define SCH5545_LDN_KBC 0x01
18 #define SCH5545_LDN_UART1 0x07
19 #define SCH5545_LDN_UART2 0x08
20 #define SCH5545_LDN_RR 0x0a /* Runtime Registers */
21 #define SCH5545_LDN_FDC 0x0b
22 #define SCH5545_LDN_LPC 0x0c /* LPC Interface */
23 #define SCH5545_LDN_PP 0x11
24 #define SCH5545_LDN_GCONF 0x3f /* Global Config */
25 
26 /* KBC config registers */
27 #define SCH5545_KRST_GA20 0xf0
28 #define SCH5545_PORT92_EN (1 << 2)
29 #define SCH5545_KBD_INT_LATCH (1 << 3)
30 #define SCH5545_MOUSE_INT_LATCH (1 << 4)
31 #define SCH5545_KBD_ISOLATION (1 << 5)
32 #define SCH5545_MOUSE_ISOLATION (1 << 6)
33 #define SCH5545_KEYBOARD_SELECT 0xf1
34 #define SCH5545_KBD_MOUSE_SWAP (1 << 0)
35 #define SCH5545_8042_RESET 0xf2
36 #define SCH5545_8042_IN_RESET (1 << 0)
37 #define SCH5545_8042_OUT_RESET (0 << 0)
38 
39 /* UART config registers */
40 #define SCH5545_UART_CONFIG_SELECT 0xf0
41 #define SCH5545_UART_CLK_64MHZ_RO (0 << 0)
42 #define SCH5545_UART_CLK_96MHZ_PLL (1 << 0)
43 #define SCH5545_UART_POWER_VTR (0 << 1)
44 #define SCH5545_UART_POWER_VCC (1 << 1)
45 #define SCH5545_UART_NO_POLARITY_INVERT (0 << 2)
46 #define SCH5545_UART_INVERT_POLARITY (1 << 2)
47 
48 /* RR config registers */
49 #define SCH5545_SPEKEY 0xf0
50 #define SCH5545_SPEKEY_WAKE_EN (0 << 1)
51 #define SCH5545_SPEKEY_WAKE_DIS (1 << 1)
52 
53 /* Floppy config registers */
54 #define SCH5545_FDD_MODE 0xf0
55 #define SCH5545_FDD_MODE_NORMAL (0 << 0)
56 #define SCH5545_FDD_MODE_ENHANCED (1 << 0)
57 #define SCH5545_FDC_DMA_MODE_BURST (0 << 1)
58 #define SCH5545_FDC_DMA_MODE_NON_BURST (1 << 1)
59 #define SCH5545_FDD_IF_MODE_AT (3 << 2)
60 #define SCH5545_FDD_IF_MODE_PS2 (1 << 2)
61 #define SCH5545_FDD_IF_MODE_MODEL30 (0 << 2)
62 #define SCH5545_FDC_OUTPUT_TYPE_OPEN_DRAIN (0 << 6)
63 #define SCH5545_FDC_OUTPUT_TYPE_PUSH_PULL (1 << 6)
64 #define SCH5545_FDC_OUTPUT_CTRL_ACTIVE (0 << 7)
65 #define SCH5545_FDC_OUTPUT_CTRL_TRISTATE (1 << 7)
66 #define SCH5545_FDD_OPTION 0xf1
67 #define SCH5545_FDD_FORCED_WP_INACTIVE (0 << 0)
68 #define SCH5545_FDD_FORCED_WP_ACTIVE (1 << 0)
69 #define SCH5545_FDD_DENSITY_NORMAL (0 << 2)
70 #define SCH5545_FDD_DENSITY_NORMAL_USER (1 << 2)
71 #define SCH5545_FDD_DENSITY_LOGIC_ONE (2 << 2)
72 #define SCH5545_FDD_DENSITY_LOGIC_ZERO (3 << 2)
73 #define SCH5545_FDD_TYPE 0xf2
74 #define SCH5545_FDD0 0xf4
75 #define SCH5545_FDD0_TYPE_SEL_DT0 (1 << 0)
76 #define SCH5545_FDD0_TYPE_SEL_DT1 (1 << 1)
77 #define SCH5545_FDD0_DRT_SEL_DRT0 (1 << 3)
78 #define SCH5545_FDD0_USE_PRECOMPENSATION (0 << 6)
79 #define SCH5545_FDD0_NO_PRECOMPENSATION (1 << 6)
80 
81 /* Parallel Port config registers */
82 #define SCH5545_PP_INT_SELECT 0x70
83 #define SCH5545_PP_SERIRQ_CHANNEL_MASK 0xf
84 #define SCH5545_PP_DMA_SELECT 0x74
85 #define SCH5545_PP_DMA_CHANNEL_MASK 0x7
86 #define SCH5545_PP_MODE 0xf0
87 #define SCH5545_PP_MODE_PRINTER (4 << 0)
88 #define SCH5545_PP_MODE_SPP (0 << 0)
89 #define SCH5545_PP_MODE_EPP19_SPP (1 << 0)
90 #define SCH5545_PP_MODE_EPP17_SPP (5 << 0)
91 #define SCH5545_PP_MODE_ECP (2 << 0)
92 #define SCH5545_PP_MODE_EPP17_ECP (3 << 0)
93 #define SCH5545_PP_MODE_EPP19_ECP (7 << 0)
94 #define SCH5545_PP_ECP_FIFO_TRESH_MASK (0xf << 3)
95 #define SCH5545_PP_INT_PULSED_LOW (1 << 7)
96 #define SCH5545_PP_INT_FOLLOWS_ACK (0 << 7)
97 #define SCH5545_PP_MODE2 0xf1
98 #define SCH5545_PP_TMOUT_CLEARED_ON_WRITE (0 << 4)
99 #define SCH5545_PP_TMOUT_CLEARED_ON_READ (1 << 4)
100 
101 /* LPC IF config registers */
102 #define SCH5545_IRQ_BASE 0x40
103 #define SCH5545_DRQ_BASE 0x50
104 /*
105  * BAR registers are 4 byte
106  * byte 0 0-6 mask, 7 reserved
107  * byte 1 0-5 frame, 6 device, 7 valid
108  * byte 2 LPC address least sig.
109  * byte 3 LPC address most sig.
110  */
111 #define SCH5545_BAR_LPC_IF 0x60
112 #define SCH5545_BAR_EM_IF 0x64
113 #define SCH5545_BAR_UART1 0x68
114 #define SCH5545_BAR_UART2 0x6c
115 #define SCH5545_BAR_RUNTIME_REG 0x70
116 /* Certain SMSC parts have SPI controller LDN 0xf with BAR rgeister at 0x74 */
117 #define SCH5545_BAR_KBC 0x78
118 #define SCH5545_BAR_FLOPPY 0x7c
119 #define SCH5545_BAR_PARPORT 0x80
120 
121 /* IRQ <> device mappings */
122 #define SCH5545_IRQ_KBD 0x01
123 #define SCH5545_IRQ_MOUSE 0x81
124 #define SCH5545_IRQ_UART1 0x07
125 #define SCH5545_IRQ_UART2 0x08
126 #define SCH5545_IRQ_EMI_MAILBOX 0x00
127 #define SCH5545_IRQ_EMI_IRQ_SOURCE 0x80
128 #define SCH5545_IRQ_RUNTIME_REG 0x0a
129 #define SCH5545_IRQ_RUNTIME_REG_SMI 0x8a
130 #define SCH5545_IRQ_FLOPPY 0x0b
131 #define SCH5545_IRQ_PARPORT 0x11
132 #define SCH5545_IRQ_DISABLED 0xff
133 
134 /* runtime registers */
135 #define SCH5545_RR_PME_STS 0x00
136 #define SCH5545_GLOBAL_PME_STS 0x01
137 #define SCH5545_RR_PME_EN 0x01
138 #define SCH5545_GLOBAL_PME_EN 0x01
139 #define SCH5545_RR_PME_STS1 0x02
140 #define SCH5545_UART2_RI_PME_STS 0x2
141 #define SCH5545_UART1_RI_PME_STS 0x4
142 #define SCH5545_KBD_PME_STS 0x8
143 #define SCH5545_MOUSE_PME_STS 0x10
144 #define SCH5545_SPECIFIC_KEY_PME_STS 0x20
145 #define SCH5545_RR_PME_STS2 0x03
146 #define SCH5545_IO_SMI_EVT_STS 0x1
147 #define SCH5545_WDT_TIMEOUT_EVT_STS 0x2
148 #define SCH5545_EM_EVT1_STS 0x4
149 #define SCH5545_EM_EVT2_STS 0x8
150 #define SCH5545_FW_EVT_STS 0x10
151 #define SCH5545_BAT_LOW_STS 0x20
152 #define SCH5545_INTRUDER_STS 0x40
153 #define SCH5545_RR_PME_STS3 0x04
154 #define SCH5545_GPIO62_PME_STS 0x1
155 #define SCH5545_GPIO54_PME_STS 0x2
156 #define SCH5545_GPIO53_PME_STS 0x4
157 #define SCH5545_GPIO35_PME_STS 0x8
158 #define SCH5545_GPIO31_PME_STS 0x10
159 #define SCH5545_GPIO25_PME_STS 0x20
160 #define SCH5545_GPIO24_PME_STS 0x40
161 #define SCH5545_GPIO21_PME_STS 0x80
162 #define SCH5545_RR_PME_EN1 0x05
163 #define SCH5545_UART2_RI_PME_EN 0x2
164 #define SCH5545_UART1_RI_PME_EN 0x4
165 #define SCH5545_KBD_PME_EN 0x8
166 #define SCH5545_MOUSE_PME_EN 0x10
167 #define SCH5545_SPECIFIC_KEY_PME_EN 0x20
168 #define SCH5545_RR_PME_EN2 0x06
169 #define SCH5545_IO_SMI_EVT_PME_EN 0x1
170 #define SCH5545_WDT_EVT_PME_EN 0x2
171 #define SCH5545_EM_EVT1_PME_EN 0x4
172 #define SCH5545_EM_EVT2_PME_EN 0x8
173 #define SCH5545_FW_EVT_PME_EN 0x10
174 #define SCH5545_BAT_LOW_PME_EN 0x20
175 #define SCH5545_INTRUDER_PME_EN 0x40
176 #define SCH5545_RR_PME_EN3 0x07
177 #define SCH5545_GPIO62_PME_EN 0x1
178 #define SCH5545_GPIO54_PME_EN 0x2
179 #define SCH5545_GPIO53_PME_EN 0x4
180 #define SCH5545_GPIO35_PME_EN 0x8
181 #define SCH5545_GPIO31_PME_EN 0x10
182 #define SCH5545_GPIO25_PME_EN 0x20
183 #define SCH5545_GPIO24_PME_EN 0x40
184 #define SCH5545_GPIO21_PME_EN 0x80
185 #define SCH5545_RR_SMI_STS 0x10
186 #define SCH5545_SMI_GLOBAL_STS 0x1
187 #define SCH5545_RR_SMI_EN 0x11
188 #define SCH5545_SMI_GLOBAL_EN 0x1
189 #define SCH5545_RR_SMI_STS1 0x12
190 #define SCH5545_LOW_BAT_SMI_STS 0x1
191 #define SCH5545_PAR_PORT_SMI_STS 0x2
192 #define SCH5545_UART2_SMI_STS 0x4
193 #define SCH5545_UART1_SMI_STS 0x8
194 #define SCH5545_FLOPPY_SMI_STS 0x10
195 #define SCH5545_EM_EVT1_SMI_STS 0x20
196 #define SCH5545_EM_EVT2_SMI_STS 0x40
197 #define SCH5545_FW_EVT_SMI_STS 0x80
198 #define SCH5545_RR_SMI_STS2 0x13
199 #define SCH5545_MOUSE_SMI_STS 0x1
200 #define SCH5545_KBD_SMI_STS 0x2
201 #define SCH5545_WATCHDOG_EVT_SMI_STS 0x8
202 #define SCH5545_INTRUSION_SMI_STS 0x10
203 #define SCH5545_RR_SMI_STS3 0x14
204 #define SCH5545_GPIO62_SMI_STS 0x1
205 #define SCH5545_GPIO54_SMI_STS 0x2
206 #define SCH5545_GPIO53_SMI_STS 0x4
207 #define SCH5545_GPIO35_SMI_STS 0x8
208 #define SCH5545_GPIO31_SMI_STS 0x10
209 #define SCH5545_GPIO25_SMI_STS 0x20
210 #define SCH5545_GPIO24_SMI_STS 0x40
211 #define SCH5545_GPIO21_SMI_STS 0x80
212 #define SCH5545_RR_SMI_EN1 0x15
213 #define SCH5545_LOW_BAT_SMI_EN 0x1
214 #define SCH5545_PAR_PORT_SMI_EN 0x2
215 #define SCH5545_UART2_SMI_EN 0x4
216 #define SCH5545_UART1_SMI_EN 0x8
217 #define SCH5545_FLOPPY_SMI_EN 0x10
218 #define SCH5545_EM_EVT1_SMI_EN 0x20
219 #define SCH5545_EM_EVT2_SMI_EN 0x40
220 #define SCH5545_FW_EVT_SMI_EN 0x1
221 #define SCH5545_RR_SMI_EN2 0x16
222 #define SCH5545_MOUSE_SMI_EN 0x1
223 #define SCH5545_KBD_SMI_EN 0x2
224 #define SCH5545_WATCHDOG_EVT_SMI_EN 0x8
225 #define SCH5545_INTRUSION_SMI_EN 0x10
226 #define SCH5545_RR_SMI_EN3 0x17
227 #define SCH5545_GPIO62_SMI_EN 0x1
228 #define SCH5545_GPIO54_SMI_EN 0x2
229 #define SCH5545_GPIO53_SMI_EN 0x4
230 #define SCH5545_GPIO35_SMI_EN 0x8
231 #define SCH5545_GPIO31_SMI_EN 0x10
232 #define SCH5545_GPIO25_SMI_EN 0x20
233 #define SCH5545_GPIO24_SMI_EN 0x40
234 #define SCH5545_GPIO21_SMI_EN 0x80
235 #define SCH5545_RR_FORCE_DISK_CH 0x20
236 #define SCH5545_FLOPPY_DISK_CHANGE 0x1
237 #define SCH5545_RR_FLOPPY_DR_SEL 0x21
238 #define SCH5545_DR_SELECT0 0x1
239 #define SCH5545_DR_SELECT1 0x2
240 #define SCH5545_FLOPPY_PRECOMP0 0x4
241 #define SCH5545_FLOPPY_PRECOMP1 0x8
242 #define SCH5545_FLOPPY_PRECOMP2 0x10
243 #define SCH5545_FLOPPY_PWR_DOWN 0x40
244 #define SCH5545_FLOPPY_SOFT_RESET 0x80
245 #define SCH5545_RR_UART1_FIFO_CTRL 0x22
246 #define SCH5545_UART1_FIFO_FE 0x1
247 #define SCH5545_UART1_FIFO_RFR 0x2
248 #define SCH5545_UART1_FIFO_XFR 0x4
249 #define SCH5545_UART1_FIFO_DMS 0x8
250 #define SCH5545_UART1_FIFO_RTL 0x40
251 #define SCH5545_UART1_FIFO_RTM 0x80
252 #define SCH5545_RR_UART2_FIFO_CTRL 0x23
253 #define SCH5545_UART2_FIFO_FE 0x1
254 #define SCH5545_UART2_FIFO_RFR 0x2
255 #define SCH5545_UART2_FIFO_XFR 0x4
256 #define SCH5545_UART2_FIFO_DMS 0x8
257 #define SCH5545_UART2_FIFO_RTL 0x40
258 #define SCH5545_UART2_FIFO_RTM 0x80
259 #define SCH5545_RR_DEV_DISABLE 0x24
260 #define SCH5545_FLOPPY_WP 0x1
261 #define SCH5545_FLOPPY_DIS 0x8
262 #define SCH5545_UART2_DIS 0x20
263 #define SCH5545_UART1_DIS 0x40
264 #define SCH5545_PAR_PORT_DIS 0x80
265 #define SCH5545_RR_LED 0x25
266 #define SCH5545_LED_BLINK_OFF 0x0
267 #define SCH5545_LED_BLINK_1HZ 0x1
268 #define SCH5545_LED_BLINK_ON 0x3
269 #define SCH5545_LED_BLINK_MASK 0x3
270 #define SCH5545_LED_COLOR_YELLOW 0x0
271 #define SCH5545_LED_COLOR_GREEN 0x4
272 #define SCH5545_LED_CODE_FETCH 0x8
273 #define SCH5545_RR_KB_SCAN 0x26
274 #define SCH5545_RR_PWRGOOD 0x27
275 #define SCH5545_PWRGOOD_DELAY 0x1
276 #define SCH5545_PWRGOOD_LOCK 0x2
277 #define SCH5545_PCIRST_OUT4_EN 0x10
278 #define SCH5545_PCIRST_OUT3_EN 0x20
279 #define SCH5545_PCIRST_OUT1_EN 0x40
280 #define SCH5545_PCIRST_OUT2_EN 0x80
281 #define SCH5545_RR_GPIO_SEL 0x28
282 #define SCH5545_RR_GPIO_READ 0x29
283 #define SCH5545_RR_GPIO_WRITE 0x2A
284 #define SCH5545_RR_FW_EVT_STS 0x30
285 #define SCH5545_RR_FW_EVT_EN 0x31
286 #define SCH5545_RR_PWR_REC_MODES 0x32
287 #define SCH5545_PWR_SUPPLY_OFF 0x00
288 #define SCH5545_PWR_SUPPLY_ON 0x80
289 #define SCH5545_RR_INTRUDER 0x34
290 #define SCH5545_INTRUSION_EDGE_STS 0x1
291 #define SCH5545_INTRUDER_PIN_STS 0x2
292 
293 void sch5545_early_init(unsigned int port);
294 void sch5545_enable_uart(unsigned int port, unsigned int uart_no);
295 void sch5545_set_led(unsigned int runtime_reg_base, unsigned int color, uint16_t blink);
296 int sch5545_get_gpio(uint8_t sio_port, uint8_t gpio);
297 
298 #endif /* SUPERIO_SCH_5545_H */
port
Definition: i915.h:29
void sch5545_enable_uart(unsigned int port, unsigned int uart_no)
void sch5545_set_led(unsigned int runtime_reg_base, unsigned int color, uint16_t blink)
int sch5545_get_gpio(uint8_t sio_port, uint8_t gpio)
void sch5545_early_init(unsigned int port)
unsigned short uint16_t
Definition: stdint.h:11
unsigned char uint8_t
Definition: stdint.h:8
Definition: pinmux.c:36