coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
|
Go to the source code of this file.
Functions | |
void | sch5545_early_init (unsigned int port) |
void | sch5545_enable_uart (unsigned int port, unsigned int uart_no) |
void | sch5545_set_led (unsigned int runtime_reg_base, unsigned int color, uint16_t blink) |
int | sch5545_get_gpio (uint8_t sio_port, uint8_t gpio) |
Definition at line 66 of file sch5545_early_init.c.
References outb(), PNP_DEV, pnp_enter_conf_state(), pnp_exit_conf_state(), pnp_read_config(), pnp_set_enable(), pnp_set_logical_device(), pnp_write_config(), SCH5545_BAR_EM_IF, SCH5545_BAR_LPC_IF, SCH5545_BAR_RUNTIME_REG, SCH5545_EMI_BASE, SCH5545_LDN_EMI, SCH5545_LDN_GCONF, SCH5545_LDN_LPC, SCH5545_LDN_RR, SCH5545_LED_BLINK_ON, SCH5545_LED_COLOR_GREEN, SCH5545_RR_PME_EN, SCH5545_RR_PME_STS, SCH5545_RUNTIME_REG_BASE, sch5545_set_led(), and set_iobase().
Referenced by bootblock_mainboard_early_init().
Definition at line 122 of file sch5545_early_init.c.
References PNP_DEV, pnp_enter_conf_state(), pnp_exit_conf_state(), pnp_set_enable(), pnp_set_logical_device(), pnp_write_config(), SCH5545_BAR_UART1, SCH5545_LDN_LPC, SCH5545_LDN_UART1, SCH5545_UART_CONFIG_SELECT, SCH5545_UART_POWER_VCC, set_iobase(), and set_irq().
Referenced by bootblock_mainboard_early_init().
Definition at line 150 of file sch5545_early_init.c.
References BIOS_ERR, dev_find_slot_pnp(), inb(), outb(), PNP_DEV, pnp_enter_conf_mode(), pnp_enter_conf_state(), pnp_exit_conf_mode(), pnp_exit_conf_state(), pnp_read_config(), pnp_set_logical_device(), printk, SCH5545_BAR_RUNTIME_REG, SCH5545_LDN_LPC, SCH5545_RR_GPIO_READ, and SCH5545_RR_GPIO_SEL.
Referenced by mainboard_final().
Definition at line 57 of file sch5545_early_init.c.
References outb(), SCH5545_LED_BLINK_MASK, SCH5545_LED_CODE_FETCH, SCH5545_LED_COLOR_GREEN, SCH5545_RR_LED, and val.
Referenced by sch5545_early_init().