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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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Go to the source code of this file.
Macros | |
#define | INTEL_OUTPUT_UNUSED 0 |
#define | INTEL_OUTPUT_ANALOG 1 |
#define | INTEL_OUTPUT_DVO 2 |
#define | INTEL_OUTPUT_SDVO 3 |
#define | INTEL_OUTPUT_LVDS 4 |
#define | INTEL_OUTPUT_TVOUT 5 |
#define | INTEL_OUTPUT_HDMI 6 |
#define | INTEL_OUTPUT_DISPLAYPORT 7 |
#define | INTEL_OUTPUT_EDP 8 |
#define | PCH_PP_UNLOCK 0xabcd0000 |
#define | WMx_LP_SR_EN (1UL<<31) |
#define | PRB0_TAIL 0x02030 |
#define | PRB0_HEAD 0x02034 |
#define | PRB0_START 0x02038 |
#define | PRB0_CTL 0x0203c |
Enumerations | |
enum | port { PORT_A = 0 , PORT_B , PORT_C , PORT_D , PORT_E , I915_NUM_PORTS } |
enum | pipe { PIPE_A = 0 , PIPE_B , PIPE_C , I915_NUM_PIPES } |
enum | transcoder { TRANSCODER_A = 0 , TRANSCODER_B , TRANSCODER_C , TRANSCODER_EDP = 0xF } |
enum | plane { PLANE_A = 0 , PLANE_B , PLANE_C } |
enum | { vio = 2 , vspin = 4 } |
Functions | |
unsigned long | io_i915_read32 (unsigned long addr) |
void | io_i915_write32 (unsigned long val, unsigned long addr) |
void | intel_prepare_ddi (void) |
int | gtt_poll (u32 reg, u32 mask, u32 value) |
void | gtt_write (u32 reg, u32 data) |
u32 | gtt_read (u32 reg) |
void | generate_fake_intel_oprom (const struct i915_gpu_controller_info *conf, struct device *dev, const char *idstr) |
enum port |
enum transcoder |
void generate_fake_intel_oprom | ( | const struct i915_gpu_controller_info * | conf, |
struct device * | dev, | ||
const char * | idstr | ||
) |
Definition at line 62 of file vbt.c.
References device::class, device::device, DIV_ROUND_UP, generate_vbt(), memset(), PCI_CLASS_REVISION, pci_read_config8(), PCI_ROM_HDR, PCI_VGA_RAM_IMAGE_START, and device::vendor.
Referenced by gma_func0_init(), and gma_ngi().
Definition at line 154 of file gma.c.
References BIOS_ERR, GT_RETRY, gtt_read(), GTT_RETRY, mask, printk, udelay(), and value.
Referenced by gma_pm_init_post_vbios(), gma_pm_init_pre_vbios(), igd_get_cdclk_broadwell(), and power_well_enable().
Definition at line 22 of file gma.c.
References gtt_res, read32(), res2mmio(), and val.
Referenced by gma_pm_init_post_vbios(), gma_pm_init_pre_vbios(), gma_setup_panel(), gtt_poll(), gtt_rmw(), igd_get_cdclk_broadwell(), and igd_get_cdclk_haswell().
Definition at line 27 of file gma.c.
References gtt_res, res2mmio(), and write32().
Referenced by gma_pm_init_post_vbios(), gma_pm_init_pre_vbios(), gma_setup_panel(), gtt_rmw(), gtt_write_powermeter(), gtt_write_regs(), igd_cdclk_init(), igd_get_cdclk_broadwell(), igd_init(), init_display_planes(), intel_prepare_ddi_buffers(), and power_well_enable().
Definition at line 61 of file intel_ddi.c.
References intel_prepare_ddi_buffers(), PORT_A, and PORT_E.
Referenced by gma_setup_panel().