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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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Go to the source code of this file.
Data Structures | |
struct | timings |
struct | dimminfo |
struct | pllparam |
struct | sysinfo |
Macros | |
#define | SYSINFO_DIMM_NOT_POPULATED 0x00 |
#define | SYSINFO_DIMM_X16SS 0x01 |
#define | SYSINFO_DIMM_X16DS 0x02 |
#define | SYSINFO_DIMM_X8DS 0x05 |
#define | SYSINFO_DIMM_X8DDS 0x06 |
Enumerations | |
enum | fsb_clk { FSB_CLOCK_667MHz = 0 , FSB_CLOCK_800MHz = 1 } |
enum | mem_clk { MEM_CLOCK_667MHz = 0 , MEM_CLOCK_800MHz = 1 } |
enum | ddr { DDR2 = 2 , DDR3 = 3 , DDR2 = 2 , DDR3 = 3 } |
enum | chip_width { CHIP_WIDTH_x4 = 0 , CHIP_WIDTH_x8 = 1 , CHIP_WIDTH_x16 = 2 , CHIP_WIDTH_x32 = 3 , CHIP_WIDTH_x4 = 0 , CHIP_WIDTH_x8 = 1 , CHIP_WIDTH_x16 = 2 , CHIP_WIDTH_x32 = 3 } |
enum | chip_cap { CHIP_CAP_256M = 0 , CHIP_CAP_512M = 1 , CHIP_CAP_1G = 2 , CHIP_CAP_2G = 3 , CHIP_CAP_4G = 4 , CHIP_CAP_8G = 5 , CHIP_CAP_16G = 6 , CHIP_CAP_256M = 0 , CHIP_CAP_512M = 1 , CHIP_CAP_1G = 2 , CHIP_CAP_2G = 3 , CHIP_CAP_4G = 4 , CHIP_CAP_8G = 5 , CHIP_CAP_16G = 6 } |
Functions | |
void | sdram_initialize (int boot_path, const u8 *sdram_addresses) |
enum chip_cap |
enum chip_width |