coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <arch/cpu.h>
#include <arch/mmio.h>
#include <cf9_reset.h>
#include <console/console.h>
#include <cpu/intel/common/common.h>
#include <cpu/x86/cr.h>
#include <cpu/x86/msr.h>
#include <southbridge/intel/common/pmbase.h>
#include <timer.h>
#include <types.h>
#include <security/tpm/tis.h>
#include "txt.h"
#include "txt_register.h"
#include "txt_getsec.h"
Go to the source code of this file.
Functions | |
static bool | is_establishment_bit_asserted (void) |
static bool | is_txt_cpu (void) |
static bool | is_txt_chipset (void) |
static void | print_memory_is_locked (void) |
void | intel_txt_romstage_init (void) |
Definition at line 84 of file romstage.c.
References BIOS_ERR, BIOS_INFO, CONFIG, CR4_SMXE, die(), intel_txt_run_sclean(), is_establishment_bit_asserted(), is_txt_chipset(), is_txt_cpu(), print_memory_is_locked(), printk, read8(), read_cr4(), read_pmbase32(), TXT_ESTS, TXT_ESTS_TXT_RESET_STS, TXT_ESTS_WAKE_ERROR_STS, txt_reset_platform(), write_cr4(), and write_pmbase32().
Referenced by mainboard_romstage_entry().
Definition at line 20 of file romstage.c.
References read8(), stopwatch_expired(), stopwatch_init_msecs_expire(), TPM_ACCESS_ESTABLISHMENT, TPM_ACCESS_REG, and TPM_ACCESS_VALID.
Referenced by intel_txt_romstage_init().
Definition at line 54 of file romstage.c.
References getsec_capabilities().
Referenced by intel_txt_romstage_init().
Definition at line 47 of file romstage.c.
References cpu_get_feature_flags_ecx(), CPUID_SMX, and CPUID_VMX.
Referenced by intel_txt_romstage_init().
Definition at line 64 of file romstage.c.
References BIOS_EMERG, CONFIG, and printk.
Referenced by intel_txt_romstage_init().