coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
bootblock.c
Go to the documentation of this file.
1
/* SPDX-License-Identifier: GPL-2.0-only */
2
3
#include <
arch/bootblock.h
>
4
#include <
device/pci_ops.h
>
5
6
void
bootblock_early_southbridge_init
(
void
)
7
{
8
/* Set FWH IDs for 2 MB flash part. */
9
if
(CONFIG_ROM_SIZE == 0x200000)
10
pci_write_config32
(
PCI_DEV
(0, 0x1f, 0), 0xe8, 0x00001111);
11
}
bootblock.h
bootblock_early_southbridge_init
void __weak bootblock_early_southbridge_init(void)
Definition:
bootblock.c:17
pci_ops.h
pci_write_config32
static __always_inline void pci_write_config32(const struct device *dev, u16 reg, u32 val)
Definition:
pci_ops.h:76
PCI_DEV
#define PCI_DEV(SEGBUS, DEV, FN)
Definition:
pci_type.h:14
src
southbridge
intel
i82801dx
bootblock.c
Generated by
1.9.1