coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
bootblock.c
Go to the documentation of this file.
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <types.h>
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#include <arch/cache.h>
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#include <
bootblock_common.h
>
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#include <symbols.h>
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#define SRAM_START ((uintptr_t)_sram / MiB)
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#define SRAM_END (DIV_ROUND_UP((uintptr_t)_esram, MiB))
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#define DRAM_START ((uintptr_t)_dram / MiB)
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#define DRAM_SIZE (CONFIG_DRAM_SIZE_MB)
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void
bootblock_soc_init
(
void
)
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{
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mmu_init
();
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/* Map everything strongly ordered by default */
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mmu_config_range
(0, 4096,
DCACHE_OFF
);
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mmu_config_range
(
SRAM_START
,
SRAM_END
-
SRAM_START
,
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DCACHE_WRITEBACK
);
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mmu_config_range
(
DRAM_START
,
DRAM_SIZE
,
DCACHE_WRITEBACK
);
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dcache_mmu_enable
();
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}
dcache_mmu_enable
void dcache_mmu_enable(void)
Definition:
cache.c:53
mmu_config_range
void mmu_config_range(u32 start_mb, u32 size_mb, enum dcache_policy policy)
Definition:
mmu.c:221
mmu_init
void mmu_init(void)
Definition:
mmu.c:242
DCACHE_WRITEBACK
@ DCACHE_WRITEBACK
Definition:
cache.h:364
DCACHE_OFF
@ DCACHE_OFF
Definition:
cache.h:363
bootblock_common.h
bootblock_soc_init
void bootblock_soc_init(void)
Definition:
bootblock.c:27
DRAM_SIZE
#define DRAM_SIZE
Definition:
bootblock.c:13
DRAM_START
#define DRAM_START
Definition:
bootblock.c:12
SRAM_START
#define SRAM_START
Definition:
bootblock.c:9
SRAM_END
#define SRAM_END
Definition:
bootblock.c:10
src
soc
ti
am335x
bootblock.c
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