coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
superio.c
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1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 
3 #include <device/device.h>
4 #include <device/pnp.h>
5 #include <pc80/keyboard.h>
6 #include <superio/conf_mode.h>
7 
8 #include "nct6776.h"
9 
10 /* Both NCT6776D and NCT6776F package variants are supported. */
11 
12 static void nct6776_init(struct device *dev)
13 {
14  if (!dev->enabled)
15  return;
16 
17  switch (dev->path.pnp.device) {
18  /* TODO: Might potentially need code for HWM or FDC etc. */
19  case NCT6776_KBC:
21  break;
22  }
23 }
24 
25 static struct device_operations ops = {
27  .set_resources = pnp_set_resources,
28  .enable_resources = pnp_enable_resources,
29  .enable = pnp_alt_enable,
30  .init = nct6776_init,
31  .ops_pnp_mode = &pnp_conf_mode_8787_aa,
32 };
33 
34 static struct pnp_info pnp_dev_info[] = {
35  { NULL, NCT6776_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x0ff8 },
36  { NULL, NCT6776_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, 0x0ff8 },
37  { NULL, NCT6776_SP1, PNP_IO0 | PNP_IRQ0, 0x0ff8 },
38  { NULL, NCT6776_SP2, PNP_IO0 | PNP_IRQ0, 0x0ff8 },
39  { NULL, NCT6776_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, 0x0fff, 0x0fff },
40  { NULL, NCT6776_CIR, PNP_IO0 | PNP_IRQ0, 0x0ff8 },
41  { NULL, NCT6776_ACPI },
42  { NULL, NCT6776_HWM_FPLED, PNP_IO0 | PNP_IO1 | PNP_IRQ0, 0x0ffe, 0x0ffe },
43  { NULL, NCT6776_VID },
44  { NULL, NCT6776_CIRWKUP, PNP_IO0 | PNP_IRQ0, 0x0ff8 },
46  { NULL, NCT6776_SVID },
47  { NULL, NCT6776_DSLP },
49  { NULL, NCT6776_WDT1 },
50  { NULL, NCT6776_GPIOBASE, PNP_IO0, 0x0ff8 },
51  { NULL, NCT6776_GPIO0 },
52  { NULL, NCT6776_GPIO1 },
53  { NULL, NCT6776_GPIO2 },
54  { NULL, NCT6776_GPIO3 },
55  { NULL, NCT6776_GPIO4 },
56  { NULL, NCT6776_GPIO5 },
57  { NULL, NCT6776_GPIO6 },
58  { NULL, NCT6776_GPIO7 },
59  { NULL, NCT6776_GPIO8 },
60  { NULL, NCT6776_GPIO9 },
61  { NULL, NCT6776_GPIOA },
62 };
63 
64 static void enable_dev(struct device *dev)
65 {
67 }
68 
70  CHIP_NAME("NUVOTON NCT6776 Super I/O")
71  .enable_dev = enable_dev,
72 };
#define ARRAY_SIZE(a)
Definition: helpers.h:12
const struct pnp_mode_ops pnp_conf_mode_8787_aa
Definition: conf_mode.c:202
#define CHIP_NAME(X)
Definition: device.h:32
uint8_t pc_keyboard_init(uint8_t probe_aux)
Definition: keyboard.c:229
#define NO_AUX_DEVICE
Definition: keyboard.h:6
#define NCT6776_GPIO3
Definition: nct6776.h:35
#define NCT6776_CIRWKUP
Definition: nct6776.h:21
#define NCT6776_GPIO0
Definition: nct6776.h:32
#define NCT6776_VID
Definition: nct6776.h:20
#define NCT6776_KBC
Definition: nct6776.h:13
#define NCT6776_GPIO6
Definition: nct6776.h:38
#define NCT6776_GPIO_PP_OD
Definition: nct6776.h:22
#define NCT6776_GPIOBASE
Definition: nct6776.h:30
#define NCT6776_DSLP
Definition: nct6776.h:24
#define NCT6776_CIR
Definition: nct6776.h:14
#define NCT6776_GPIO9
Definition: nct6776.h:41
#define NCT6776_SVID
Definition: nct6776.h:23
#define NCT6776_FDC
Definition: nct6776.h:9
#define NCT6776_GPIOA
Definition: nct6776.h:42
#define NCT6776_GPIO2
Definition: nct6776.h:34
#define NCT6776_GPIOA_LDN
Definition: nct6776.h:25
#define NCT6776_GPIO7
Definition: nct6776.h:39
#define NCT6776_GPIO4
Definition: nct6776.h:36
#define NCT6776_PP
Definition: nct6776.h:10
#define NCT6776_WDT1
Definition: nct6776.h:28
#define NCT6776_HWM_FPLED
Definition: nct6776.h:19
#define NCT6776_GPIO8
Definition: nct6776.h:40
#define NCT6776_GPIO5
Definition: nct6776.h:37
#define NCT6776_SP2
Definition: nct6776.h:12
#define NCT6776_SP1
Definition: nct6776.h:11
#define NCT6776_ACPI
Definition: nct6776.h:18
#define NCT6776_GPIO1
Definition: nct6776.h:33
struct chip_operations superio_nuvoton_nct6776_ops
Definition: superio.c:69
static void enable_dev(struct device *dev)
Definition: superio.c:64
static struct device_operations ops
Definition: superio.c:25
static struct pnp_info pnp_dev_info[]
Definition: superio.c:34
static void nct6776_init(struct device *dev)
Definition: superio.c:12
#define PNP_IRQ1
Definition: pnp.h:48
#define PNP_DRQ0
Definition: pnp.h:49
#define PNP_IO1
Definition: pnp.h:43
#define PNP_IO0
Definition: pnp.h:42
#define PNP_IRQ0
Definition: pnp.h:47
void pnp_read_resources(struct device *dev)
Definition: pnp_device.c:114
void pnp_enable_devices(struct device *base_dev, struct device_operations *ops, unsigned int functions, struct pnp_info *info)
Definition: pnp_device.c:371
void pnp_set_resources(struct device *dev)
Definition: pnp_device.c:157
void pnp_alt_enable(struct device *dev)
Definition: pnp_device.c:191
void pnp_enable_resources(struct device *dev)
Definition: pnp_device.c:173
#define NULL
Definition: stddef.h:19
void(* read_resources)(struct device *dev)
Definition: device.h:39
struct pnp_path pnp
Definition: path.h:117
Definition: device.h:107
struct device_path path
Definition: device.h:115
unsigned int enabled
Definition: device.h:122
Definition: pnp.h:37
unsigned int device
Definition: path.h:59