4 #include <PlatformMemoryConfiguration.h>
53 static const PCIe_PORT_DESCRIPTOR
PortList[] = {
57 PCIE_ENGINE_DATA_INITIALIZER(PciePortEngine, 8, 23),
58 PCIE_PORT_DATA_INITIALIZER(PortEnabled, ChannelTypeExt6db, 2,
67 PCIE_ENGINE_DATA_INITIALIZER(PcieUnusedEngine, 16, 23),
68 PCIE_PORT_DATA_INITIALIZER(PortDisabled, ChannelTypeExt6db, 3,
78 PCIE_ENGINE_DATA_INITIALIZER(PciePortEngine, 4, 4),
79 PCIE_PORT_DATA_INITIALIZER(PortEnabled, ChannelTypeExt6db, 4,
89 PCIE_ENGINE_DATA_INITIALIZER(PciePortEngine, 5, 5),
90 PCIE_PORT_DATA_INITIALIZER(PortEnabled, ChannelTypeExt6db, 5,
100 PCIE_ENGINE_DATA_INITIALIZER(PciePortEngine, 6, 6),
101 PCIE_PORT_DATA_INITIALIZER(PortEnabled, ChannelTypeExt6db, 6,
111 PCIE_ENGINE_DATA_INITIALIZER(PciePortEngine, 7, 7),
112 PCIE_PORT_DATA_INITIALIZER(PortEnabled, ChannelTypeExt6db, 7,
121 DESCRIPTOR_TERMINATE_LIST,
122 PCIE_ENGINE_DATA_INITIALIZER(PciePortEngine, 0, 3),
123 PCIE_PORT_DATA_INITIALIZER(PortEnabled, ChannelTypeExt6db, 8,
131 static const PCIe_DDI_DESCRIPTOR
DdiList[] = {
135 PCIE_ENGINE_DATA_INITIALIZER(PcieDdiEngine, 24, 27),
136 PCIE_DDI_DATA_INITIALIZER(ConnectorTypeDP, Aux1, Hdp1)
141 PCIE_ENGINE_DATA_INITIALIZER(PcieDdiEngine, 28, 31),
142 PCIE_DDI_DATA_INITIALIZER(ConnectorTypeNutmegDpToVga, Aux2, Hdp2)
146 DESCRIPTOR_TERMINATE_LIST,
147 PCIE_ENGINE_DATA_INITIALIZER(PcieDdiEngine, 32, 35),
148 PCIE_DDI_DATA_INITIALIZER(ConnectorTypeDP, Aux3, Hdp3)
154 FCH_RESET_INTERFACE *FchReset = &Reset->FchInterface;
155 FchReset->Xhci0Enable =
CONFIG(HUDSON_XHCI_ENABLE);
156 FchReset->Xhci1Enable = FALSE;
160 .Flags = DESCRIPTOR_TERMINATE_LIST,
168 InitEarly->GnbConfig.PcieComplexList = &
PcieComplex;
183 NUMBER_OF_DIMMS_SUPPORTED(ANY_SOCKET, ANY_CHANNEL, 1),
184 NUMBER_OF_CHANNELS_SUPPORTED(ANY_SOCKET, 2),
185 MEMCLK_DIS_MAP(ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00),
186 CKE_TRI_MAP(ANY_SOCKET, ANY_CHANNEL, 0x05, 0x0A),
187 ODT_TRI_MAP(ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x00, 0x00),
188 CS_TRI_MAP(ANY_SOCKET, ANY_CHANNEL, 0x01, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00),
201 InitMid->GnbMidConfiguration.iGpuVgaMode = 0;
void board_BeforeInitEarly(struct sysinfo *cb, AMD_EARLY_PARAMS *InitEarly)
void board_BeforeInitPost(struct sysinfo *cb, AMD_POST_PARAMS *InitPost)
void board_BeforeInitReset(struct sysinfo *cb, AMD_RESET_PARAMS *Reset)
void board_BeforeInitMid(struct sysinfo *cb, AMD_MID_PARAMS *InitMid)
static const PCIe_COMPLEX_DESCRIPTOR PcieComplex
static const PCIe_DDI_DESCRIPTOR DdiList[]
static CONST PSO_ENTRY ROMDATA PlatformMemoryTable[]
static const PCIe_PORT_DESCRIPTOR PortList[]