Macros
#define	MSR_CORE_THREAD_COUNT 0x35

#define	MSR_PLATFORM_INFO 0xce

#define	PLATFORM_INFO_SET_TDP (1 << 29)

#define	MSR_PKG_CST_CONFIG_CONTROL 0xe2

#define	MSR_FEATURE_CONFIG 0x13c

#define	FEATURE_CONFIG_RESERVED_MASK 0x3ULL

#define	FEATURE_CONFIG_LOCK (1 << 0)

#define	MSR_POWER_MISC 0x120

#define	ENABLE_IA_UNTRUSTED (1 << 6)

#define	IA32_MCG_CAP 0x179

#define	IA32_MCG_CAP_COUNT_MASK 0xff

#define	IA32_MCG_CAP_CTL_P_BIT 8

#define	IA32_MCG_CAP_CTL_P_MASK (1 << IA32_MCG_CAP_CTL_P_BIT)

#define	IA32_MCG_CTL 0x17b

#define	SMM_MCA_CAP_MSR 0x17d

#define	SMM_CPU_SVRSTR_BIT 57

#define	SMM_CPU_SVRSTR_MASK (1 << (SMM_CPU_SVRSTR_BIT - 32))

#define	MSR_FLEX_RATIO 0x194

#define	FLEX_RATIO_LOCK (1 << 20)

#define	FLEX_RATIO_EN (1 << 16)

#define	THERMAL_MONITOR_ENABLE_BIT (1 << 3)

#define	MSR_MISC_PWR_MGMT 0x1aa

#define	MISC_PWR_MGMT_EIST_HW_DIS (1 << 0)

#define	MSR_TURBO_RATIO_LIMIT 0x1ad

#define	MSR_TEMPERATURE_TARGET 0x1a2

#define	EMRR_PHYS_BASE_MSR 0x1f4

#define	MSR_PRMRR_PHYS_MASK 0x1f5

#define	MSR_POWER_CTL 0x1fc

#define	MSR_LT_LOCK_MEMORY 0x2e7

#define	MSR_UNCORE_PRMRR_PHYS_BASE 0x2f4

#define	MSR_UNCORE_PRMRR_PHYS_MASK 0x2f5

#define	SMM_FEATURE_CONTROL_MSR 0x4e0

#define	SMM_CPU_SAVE_EN (1 << 1)

#define	MSR_C_STATE_LATENCY_CONTROL_0 0x60a

#define	MSR_C_STATE_LATENCY_CONTROL_1 0x60b

#define	MSR_C_STATE_LATENCY_CONTROL_2 0x60c

#define	MSR_C_STATE_LATENCY_CONTROL_3 0x633

#define	MSR_C_STATE_LATENCY_CONTROL_4 0x634

#define	MSR_C_STATE_LATENCY_CONTROL_5 0x635

#define	IRTL_VALID (1 << 15)

#define	IRTL_1_NS (0 << 10)

#define	IRTL_32_NS (1 << 10)

#define	IRTL_1024_NS (2 << 10)

#define	IRTL_32768_NS (3 << 10)

#define	IRTL_1048576_NS (4 << 10)

#define	IRTL_33554432_NS (5 << 10)

#define	IRTL_RESPONSE_MASK (0x3ff)

#define	MSR_COUNTER_24_MHZ 0x637

#define	MSR_PKG_POWER_LIMIT 0x610

#define	PKG_POWER_LIMIT_MASK 0x7fff

#define	PKG_POWER_LIMIT_EN (1 << 15)

#define	PKG_POWER_LIMIT_CLAMP (1 << 16)

#define	PKG_POWER_LIMIT_TIME_SHIFT 17

#define	PKG_POWER_LIMIT_TIME_MASK 0x7f

#define	MSR_VR_CURRENT_CONFIG 0x601

#define	MSR_VR_MISC_CONFIG 0x603

#define	MSR_PKG_POWER_SKU_UNIT 0x606

#define	MSR_PKG_POWER_SKU 0x614

#define	MSR_DDR_RAPL_LIMIT 0x618

#define	MSR_VR_MISC_CONFIG2 0x636

#define	MSR_PP0_POWER_LIMIT 0x638

#define	MSR_PP1_POWER_LIMIT 0x640

#define	MSR_CONFIG_TDP_NOMINAL 0x648

#define	MSR_CONFIG_TDP_LEVEL1 0x649

#define	MSR_CONFIG_TDP_LEVEL2 0x64a

#define	MSR_CONFIG_TDP_CONTROL 0x64b

#define	MSR_TURBO_ACTIVATION_RATIO 0x64c

#define	SMBASE_MSR 0xc20

#define	IEDBASE_MSR 0xc22

#define	SMRR_SUPPORTED (1 << 11)

#define	PRMRR_SUPPORTED (1 << 12)

Functions
unsigned int	bus_freq_khz (void)

Macro Definition Documentation

◆ EMRR_PHYS_BASE_MSR

#define EMRR_PHYS_BASE_MSR 0x1f4

Definition at line 32 of file msr.h.

◆ ENABLE_IA_UNTRUSTED

#define ENABLE_IA_UNTRUSTED (1 << 6)

Definition at line 14 of file msr.h.

◆ FEATURE_CONFIG_LOCK

#define FEATURE_CONFIG_LOCK (1 << 0)

Definition at line 12 of file msr.h.

◆ FEATURE_CONFIG_RESERVED_MASK

#define FEATURE_CONFIG_RESERVED_MASK 0x3ULL

Definition at line 11 of file msr.h.

◆ FLEX_RATIO_EN

#define FLEX_RATIO_EN (1 << 16)

Definition at line 25 of file msr.h.

◆ FLEX_RATIO_LOCK

#define FLEX_RATIO_LOCK (1 << 20)

Definition at line 24 of file msr.h.

◆ IA32_MCG_CAP

#define IA32_MCG_CAP 0x179

Definition at line 15 of file msr.h.

◆ IA32_MCG_CAP_COUNT_MASK

#define IA32_MCG_CAP_COUNT_MASK 0xff

Definition at line 16 of file msr.h.

◆ IA32_MCG_CAP_CTL_P_BIT

#define IA32_MCG_CAP_CTL_P_BIT 8

Definition at line 17 of file msr.h.

◆ IA32_MCG_CAP_CTL_P_MASK

#define IA32_MCG_CAP_CTL_P_MASK (1 << IA32_MCG_CAP_CTL_P_BIT)

Definition at line 18 of file msr.h.

◆ IA32_MCG_CTL

#define IA32_MCG_CTL 0x17b

Definition at line 19 of file msr.h.

◆ IEDBASE_MSR

#define IEDBASE_MSR 0xc22

Definition at line 82 of file msr.h.

◆ IRTL_1024_NS

#define IRTL_1024_NS (2 << 10)

Definition at line 50 of file msr.h.

◆ IRTL_1048576_NS

#define IRTL_1048576_NS (4 << 10)

Definition at line 52 of file msr.h.

◆ IRTL_1_NS

#define IRTL_1_NS (0 << 10)

Definition at line 48 of file msr.h.

◆ IRTL_32768_NS

#define IRTL_32768_NS (3 << 10)

Definition at line 51 of file msr.h.

◆ IRTL_32_NS

#define IRTL_32_NS (1 << 10)

Definition at line 49 of file msr.h.

◆ IRTL_33554432_NS

#define IRTL_33554432_NS (5 << 10)

Definition at line 53 of file msr.h.

◆ IRTL_RESPONSE_MASK

#define IRTL_RESPONSE_MASK (0x3ff)

Definition at line 54 of file msr.h.

◆ IRTL_VALID

#define IRTL_VALID (1 << 15)

Definition at line 47 of file msr.h.

◆ MISC_PWR_MGMT_EIST_HW_DIS

#define MISC_PWR_MGMT_EIST_HW_DIS (1 << 0)

Definition at line 29 of file msr.h.

◆ MSR_C_STATE_LATENCY_CONTROL_0

#define MSR_C_STATE_LATENCY_CONTROL_0 0x60a

Definition at line 41 of file msr.h.

◆ MSR_C_STATE_LATENCY_CONTROL_1

#define MSR_C_STATE_LATENCY_CONTROL_1 0x60b

Definition at line 42 of file msr.h.

◆ MSR_C_STATE_LATENCY_CONTROL_2

#define MSR_C_STATE_LATENCY_CONTROL_2 0x60c

Definition at line 43 of file msr.h.

◆ MSR_C_STATE_LATENCY_CONTROL_3

#define MSR_C_STATE_LATENCY_CONTROL_3 0x633

Definition at line 44 of file msr.h.

◆ MSR_C_STATE_LATENCY_CONTROL_4

#define MSR_C_STATE_LATENCY_CONTROL_4 0x634

Definition at line 45 of file msr.h.

◆ MSR_C_STATE_LATENCY_CONTROL_5

#define MSR_C_STATE_LATENCY_CONTROL_5 0x635

Definition at line 46 of file msr.h.

◆ MSR_CONFIG_TDP_CONTROL

#define MSR_CONFIG_TDP_CONTROL 0x64b

Definition at line 77 of file msr.h.

◆ MSR_CONFIG_TDP_LEVEL1

#define MSR_CONFIG_TDP_LEVEL1 0x649

Definition at line 75 of file msr.h.

◆ MSR_CONFIG_TDP_LEVEL2

#define MSR_CONFIG_TDP_LEVEL2 0x64a

Definition at line 76 of file msr.h.

◆ MSR_CONFIG_TDP_NOMINAL

#define MSR_CONFIG_TDP_NOMINAL 0x648

Definition at line 74 of file msr.h.

◆ MSR_CORE_THREAD_COUNT

#define MSR_CORE_THREAD_COUNT 0x35

Definition at line 6 of file msr.h.

◆ MSR_COUNTER_24_MHZ

#define MSR_COUNTER_24_MHZ 0x637

Definition at line 55 of file msr.h.

◆ MSR_DDR_RAPL_LIMIT

#define MSR_DDR_RAPL_LIMIT 0x618

Definition at line 69 of file msr.h.

◆ MSR_FEATURE_CONFIG

#define MSR_FEATURE_CONFIG 0x13c

Definition at line 10 of file msr.h.

◆ MSR_FLEX_RATIO

#define MSR_FLEX_RATIO 0x194

Definition at line 23 of file msr.h.

◆ MSR_LT_LOCK_MEMORY

#define MSR_LT_LOCK_MEMORY 0x2e7

Definition at line 35 of file msr.h.

◆ MSR_MISC_PWR_MGMT

#define MSR_MISC_PWR_MGMT 0x1aa

Definition at line 28 of file msr.h.

◆ MSR_PKG_CST_CONFIG_CONTROL

#define MSR_PKG_CST_CONFIG_CONTROL 0xe2

Definition at line 9 of file msr.h.

◆ MSR_PKG_POWER_LIMIT

#define MSR_PKG_POWER_LIMIT 0x610

Definition at line 58 of file msr.h.

◆ MSR_PKG_POWER_SKU

#define MSR_PKG_POWER_SKU 0x614

Definition at line 68 of file msr.h.

◆ MSR_PKG_POWER_SKU_UNIT

#define MSR_PKG_POWER_SKU_UNIT 0x606

Definition at line 67 of file msr.h.

◆ MSR_PLATFORM_INFO

#define MSR_PLATFORM_INFO 0xce

Definition at line 7 of file msr.h.

◆ MSR_POWER_CTL

#define MSR_POWER_CTL 0x1fc

Definition at line 34 of file msr.h.

◆ MSR_POWER_MISC

#define MSR_POWER_MISC 0x120

Definition at line 13 of file msr.h.

◆ MSR_PP0_POWER_LIMIT

#define MSR_PP0_POWER_LIMIT 0x638

Definition at line 71 of file msr.h.

◆ MSR_PP1_POWER_LIMIT

#define MSR_PP1_POWER_LIMIT 0x640

Definition at line 72 of file msr.h.

◆ MSR_PRMRR_PHYS_MASK

#define MSR_PRMRR_PHYS_MASK 0x1f5

Definition at line 33 of file msr.h.

◆ MSR_TEMPERATURE_TARGET

#define MSR_TEMPERATURE_TARGET 0x1a2

Definition at line 31 of file msr.h.

◆ MSR_TURBO_ACTIVATION_RATIO

#define MSR_TURBO_ACTIVATION_RATIO 0x64c

Definition at line 78 of file msr.h.

◆ MSR_TURBO_RATIO_LIMIT

#define MSR_TURBO_RATIO_LIMIT 0x1ad

Definition at line 30 of file msr.h.

◆ MSR_UNCORE_PRMRR_PHYS_BASE

#define MSR_UNCORE_PRMRR_PHYS_BASE 0x2f4

Definition at line 36 of file msr.h.

◆ MSR_UNCORE_PRMRR_PHYS_MASK

#define MSR_UNCORE_PRMRR_PHYS_MASK 0x2f5

Definition at line 37 of file msr.h.

◆ MSR_VR_CURRENT_CONFIG

#define MSR_VR_CURRENT_CONFIG 0x601

Definition at line 65 of file msr.h.

◆ MSR_VR_MISC_CONFIG

#define MSR_VR_MISC_CONFIG 0x603

Definition at line 66 of file msr.h.

◆ MSR_VR_MISC_CONFIG2

#define MSR_VR_MISC_CONFIG2 0x636

Definition at line 70 of file msr.h.

◆ PKG_POWER_LIMIT_CLAMP

#define PKG_POWER_LIMIT_CLAMP (1 << 16)

Definition at line 61 of file msr.h.

◆ PKG_POWER_LIMIT_EN

#define PKG_POWER_LIMIT_EN (1 << 15)

Definition at line 60 of file msr.h.

◆ PKG_POWER_LIMIT_MASK

#define PKG_POWER_LIMIT_MASK 0x7fff

Definition at line 59 of file msr.h.

◆ PKG_POWER_LIMIT_TIME_MASK

#define PKG_POWER_LIMIT_TIME_MASK 0x7f

Definition at line 63 of file msr.h.

◆ PKG_POWER_LIMIT_TIME_SHIFT

#define PKG_POWER_LIMIT_TIME_SHIFT 17

Definition at line 62 of file msr.h.

◆ PLATFORM_INFO_SET_TDP

#define PLATFORM_INFO_SET_TDP (1 << 29)

Definition at line 8 of file msr.h.

◆ PRMRR_SUPPORTED

#define PRMRR_SUPPORTED (1 << 12)

Definition at line 86 of file msr.h.

◆ SMBASE_MSR

#define SMBASE_MSR 0xc20

Definition at line 81 of file msr.h.

◆ SMM_CPU_SAVE_EN

#define SMM_CPU_SAVE_EN (1 << 1)

Definition at line 39 of file msr.h.

◆ SMM_CPU_SVRSTR_BIT

#define SMM_CPU_SVRSTR_BIT 57

Definition at line 21 of file msr.h.

◆ SMM_CPU_SVRSTR_MASK

#define SMM_CPU_SVRSTR_MASK (1 << (SMM_CPU_SVRSTR_BIT - 32))

Definition at line 22 of file msr.h.

◆ SMM_FEATURE_CONTROL_MSR

#define SMM_FEATURE_CONTROL_MSR 0x4e0

Definition at line 38 of file msr.h.

◆ SMM_MCA_CAP_MSR

#define SMM_MCA_CAP_MSR 0x17d

Definition at line 20 of file msr.h.

◆ SMRR_SUPPORTED

#define SMRR_SUPPORTED (1 << 11)

Definition at line 85 of file msr.h.

◆ THERMAL_MONITOR_ENABLE_BIT

#define THERMAL_MONITOR_ENABLE_BIT (1 << 3)

Definition at line 27 of file msr.h.

Function Documentation

◆ bus_freq_khz()

unsigned int bus_freq_khz ( void )

Definition at line 7 of file tsc_freq.c.

Referenced by tsc_freq_mhz().

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Macros

Functions